ZedBoard Booting and Configuration Guide
ISE Design Suite 14.1
2
Introduction
This document provides an introduction to the available configuration and processor boot
modes of the Avnet ZedBoard development board. The example design used in this
guide is a basic Zynq
TM
-7000 All Programmable SoC design implemented and tested on
the Avnet ZedBoard development board. For more information about this provided
design or to build it for yourself please consult the ZedBoard: Zynq-7000 EPP Concepts,
Tools, and Techniques hands-on guide found at
www.zedboard.org/design
. Using this
example design this guide will show you how to use the JTAG configuration mode of the
ZedBoard as well as how to boot the processor and configure the programmable logic of
the Zynq-7000 device using the SD card and QSPI boot modes. The tasks performed in
this guide follow a logical progression such that it is expected that users will start at the
beginning and work their way toward the end.
Reference Design Requirements
Software
The software requirements for this reference design are:
Linux, Windows XP, Windows 7
(www.xilinx.com/ise/ossupport/index.htm)
Xilinx ISE Design Suite 14.1, with PlanAhead and SDK
Hardware
The hardware setup for this reference design is:
Computer with 1.1 GB RAM and 1.1 GB virtual memory (recommended)
(www.xilinx.com/ise/products/memory.htm)
Avnet ZedBoard development board
USB-A to micro-B cables
o
UART
o
JTAG
Power supply (12V)
