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The following diagram illustrates the power-up flow with an end-user carrier card:
Figure 17
– Power-Up Flow with Carrier Card
2.15.4 PCB Bypass / Decoupling Strategy
The UltraZed-EG SOM design follows at a minimum the PCB decoupling strategy as outlined in
UG583
for
the Zynq Ult MPSoC in the SFVA625 package.
NOTE: These quantities are considered preliminary and subject to change because power and
package modelling is still in progress at Xilinx. A review of these requirements is required as this
design moves from engineering silicon to production silicon.
Figure 18
– PCB Decoupling Capacitor Requirements
