AOpen MX36, Онлайн-руководство

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Gl
ossary
D D I I M M M M ( ( D D u u a a l l I I n n L L i i n n e e M M e e m m o o r r y y M M o o d d u u l l e e ) )
DIMM socket has total 168-pin and supports 64-bit data. It can be single or double side, the
golden finger signals on each side of PCB are different, that is why it was called Dual In Line.
Almost all DIMMs are made by SDRAM , which operate at 3.3V. Note that some old DIMMs are
made by FPM/ EDO and only operate at 5V. Do not confuse them with SDRAM DIMM.
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The ECC mode needs 8 ECC bits for 64-bit data. Each time memory is accessed; ECC bits are
updated and checked by a special algorithm. The ECC algorithm has the ability to detect
double-bit error and automatically correct single-bit error while parity mode can only detect
single-bit error.
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The EDO DRAM technology is actually very similar to FPM (Fast Page Mode). Unlike traditional
FPM that tri-states the memory output data to start the pre-charge activity, EDO DRAM holds the
memory data valid until the next memory access cycle, that is similar to pipeline effect and
reduces one clock state.