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1-10 ADSP-21065L SHARC User’s Manual
• Two programmable timers and twelve general-purpose
I/Os
• Four external hardware interrupts
These additional features support and enhance the DSP core’s
components:
• Context switching
• Comprehensive instruction set
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The DSP core contains three independent computation units:
• ALU
Performs a standard set of arithmetic and logic operations in both
fixed-point and floating-point formats.
• Multiplier with a fixed-point accumulator
Performs floating-point and fixed-point multiplication, and
fixed-point multiply/add and multiply/subtract operations.
• Shifter
Performs logical and arithmetic shifts, bit manipulation, field
deposit and extraction, and exponent derivation operations on
32-bit operands.
For meeting a wide variety of processing needs, the computation units
process data in three formats
• 32-bit, fixed-point
• 32-bit, floating-point
• 40-bit, floating-point