ADXL180
Rev. 0 | Page 16 of 56
The synchronization pulse detector is reenabled after t
B
, which
is an idle bit transmission following the last data frame bit (see
the Data Frame Definition section). At this point, the device is
ready to receive the next sync pulse.
If the application requires or uses a pulse of nonuniform shape,
such as, for example, rising above V
SPT
and subsequently
toggling such that it falls below V
SPT
one or more times before
t
SPD
, consult Analog Devices, Inc., applications support for
further information on application specific pulse recognition.
Note, this counter means that when an invalid length sync pulse
of less than seven counts is followed less than seven counts later
by a subsequent sync pulse, detection may occur when the
counter is incremented further by less than seven counts by the
second pulse.
Bus Discharge Enable
Table 8. Bus Discharge Enable
BDE Definition
0
Bus discharge disabled (default).
1
Bus discharge enabled. Only active when SYEN = 1.
The bus discharge enable (BDE) bit in the configuration regis-
ters can be set to aid in the discharge of the bus voltage after
a synchronization pulse is detected. If the BDE bit is set, the
ADXL180 changes the bus current (I
BUS
) level from I
IDLE
to
I
SIG
once a valid synchronization pulse has been detected.
The control module then sets the voltage on the bus to the
nominal operating level. The bus capacitance is discharged
by the ADXL180 device. The current level of I
SIG
acts as an
active pull-down current to return the V
BP
voltage to the
nominal supply voltage. The pull-down current pulse can
also be used as a handshake with the control module acting
as an acknowledgement of the synchronization pulse.
V
SP
V
SPND
V
SPT
V
SPND
V
SPT
t
ADC
t
PS
t
SPD
t
B
t
M
…
…
…
t
STD
t
SPP
BUS
VOLTAGE
NO DETECT CASE
DETECT CASE
DATA FRAME
TIME
SYNCH
DETECT/
BLANKING
ADC BUSY
BUS DISCHARGE CURRENT
(IF BDE = 1)
ADXL180
RETURN
CURRENT
07
54
4-
0
12
Figure 12. Synchronization Pulse Timing (Single Device)
