Analog Devices ADP1974-EVALZ, Руководство пользователя

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UG-883 ADP1974-EVALZ User Guide
Rev. 0 | Page 8 of 12
EVALUATION BOARD HARDWARE
TYPICAL APPLICATION CIRCUIT
DH
DL
CL
GND
24V RECYLCING
DC BUS
VIN
24V
EN
COMP
FAULT
MODE
FROM
CENTRAL PC
FROM
ANALOG IC
ADP1974
VREG
FREQ
SYNC
DMAX
SCFG
SS
DT
HV
MOSFET
DRIVER
BAT
T
E
RY
13517-
016
Figure 16. ADP1974 Typical Application Circuit
Table 1. Input Pins that Require External Power Supplies or External Control Signals
Power Supply Connector Voltage Range (V) Purpose
V
IN
1
VIN 6 to 60 Supplies power to the ADP1974 internal control circuitry.
V
EN
1 EN 0 to 60 Supplies logic signal to enable operation of the ADP1974 .
V
MODE
1 MODE 0 to 5.5 Supplies logic signal to select boost/recycle mode or buck/charge mode.
V
FAULT
2 FAULT 0 to 60 Supplies the signal to indicate when a fault condition has occurred in the application
external to the
ADP1974 .
V
COMP
3 COMP 0.5 to 5.0 Supplies the error signal that is compared internally to the liner ramp to produce the
PWM signal.
V
SYNC
SYNC 0 to 5.5 Supplies the external synchronization waveform when the ADP1974 is a slave device,
and SYNC is configured as an input.
1 V
IN
can also be used to supply V
EN
and V
MODE
via jumper connections. Alternatively, EN and MODE can be powered with separate power supplies.
2
When used with the AD8450 , the FAULT signal is supplied by the FAULT pin (Pin 46) of the AD8450 .
3 When used with the AD8450 , the COMP signal is supplied by the VCTRL pin (Pin 59), the error amplifier output of the AD8450 .
Table 2. Output Pins to Observe with Ammeter or Oscilloscope
Output
Signal
Connector Signal
Recommended
Equipment
Expected Measurement
V
VREG
1 VREG 5 V dc Ammeter or oscilloscope When V
IN
> 6 V, V
VREG
rises to 5 V.
V
DL
DL 0 V to VREG square wave Oscilloscope When MODE is logic low, a square wave is visible on DH.
When MODE is logic high, DL is complementary to DH.
V
DH
DH 0 V to VREG square wave Oscilloscope When MODE is logic high, a square wave is visible on DL.
When MODE is logic low, DH is complementary to DL.
V
SYNC
SYNC 0 V to VREG square wave Oscilloscope When SYNC is configured as an output, the SYNC pin outputs a
clock signal programmed by R
FREQ
.
I
CL
CL Magnitude dependent
on R
S
triangle wave
Oscilloscope The current rises and falls with the duty cycle of DH and DL.
1 V
VREG
provides the logic high signal for the MODE pin when a jumper is placed on the top two pins of the MODE test bus.