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UG-076 

Evaluation Board User Guide

 

Rev. A | Page 6 of 16 

7.

 

Program the R (reference) divider by clicking the 

R DIVIDER

 box at the top of the main window.  

Set the desired value and click 

OK

 (see Figure 13). 

8.

 

Program the N (feedback) divider by clicking the 

N DIVIDER

 box at the top of the main window.  

Set the desired value and click 

OK

. For this example,  

N = 5500 can use 8/9 dual modulus mode with A = 4  
and B = 687.  

9.

 

Set the charge pump current (1.2 mA in this case) by 
clicking the 

CHARGE PUMP

 box in the upper right 

corner of the main window, and click 

OK

10.

 

Note that if the desired configuration has the a phase 
detector frequency above 50 MHz, an antibacklash  
pulse width of 1.3 ns may work better. This setting is 
accessed by clicking the 

PFD

 box to the left of the 

CHARGE PUMP

 box. However, this setting normally  

does not need to be modified. 

11.

 

Set the VCO divider by clicking the green 

VCO

 box in the 

center of the main window immediately to the left of the 

Cal VCO

 button. 

12.

 

Power down unused drivers by clicking the numbered 
triangular symbol (see Figure 7) on the right side of the 
main window, and then clicking 

Safe Power Down

0

8746-

026

 

Figure 7. Driver Symbol 

13.

 

Set the channel dividers by clicking 

DIVIDER 0

 through 

DIVIDER 3

, and entering the divider ratio. 

14.

 

Click the flashing red 

WRITE

 button under the 

REGISTER 

W/R

 section. This loads the desired settings to th

AD9520

 

evaluation board.  

15.

 

Click the blinking yellow 

Cal VCO

 button to open the  

VCO calibration window. The default VCO divide ratio 
(16) works for all applications. Click the 

Cal VCO

 button 

in the 

Calibrate VCO

 window to begin calibration (see 

Figure 19). The PLL is now locked and the lock detect (LD) 
LED on the left side of the board is on. 

 

Содержание AD9520-0

Страница 1: ...are very low noise phase locked loop PLL clock synthesizers featuring an integrated voltage controlled oscillator VCO clock dividers and up to 24 outputs The AD9520 product series features automatic...

Страница 2: ...D9520 on a User Board 15 AD9520 Binary File Generation 16 Checksum Generation 16 Avoiding Checksum Mismatches 16 REVISION HISTORY 5 2017 Rev 0 to Rev A Changes to Title and General Description Section...

Страница 3: ...ng is recommended in applications requiring automatic hitless reference switching There is a possibility that the AD9520 receive buffer can chatter when an ac coupled clock stops toggling Connect an o...

Страница 4: ...ing that the evaluation board was found or red text appears indicating that the evaluation board was not found 2 If the evaluation board is found click anywhere in the pop up window with the Evaluatio...

Страница 5: ...p from the PLL MODE box found at the top of the main window see Figure 8 2 Enter the intended reference input frequency in megahertz in the REF 1 MHz box at the upper left corner of the main window 3...

Страница 6: ...f the CHARGE PUMP box However this setting normally does not need to be modified 11 Set the VCO divider by clicking the green VCO box in the center of the main window immediately to the left of the Ca...

Страница 7: ...are listed in the following sections and each of these subsections has its own window From the main window each functional block can be accessed by clicking that block in the main window When a subwi...

Страница 8: ...N WINDOW The PLL Configuration window shown in Figure 11 is opened by clicking the Config PLL button on the main screen The window has three sections SyncB Counter Reset Mode PLL Status Registers and...

Страница 9: ...ssed by clicking the EEPROM button near the lower left corner of the main window 08746 008 Figure 12 EEPROM Control Window To store the current register settings of the AD9520 to the EEPROM click the...

Страница 10: ...der value For example it is not possible to use the internal VCO and a feedback divider of 30 However the R divider can be doubled which allows a feedback divider of 60 The feedback divider window has...

Страница 11: ...king the Cal VCO button in the main window 08746 015 Figure 19 Calibrate VCO Window A valid reference input signal must be present to complete VCO calibration and the VCO must be recalibrated any time...

Страница 12: ...istors on each output This termination scheme is ideal for LVPECL drivers However this scheme degrades the CMOS driver performance Improved CMOS driver performance is achieved by removing the 200 pull...

Страница 13: ...ted evaluation board see Figure 25 08746 019 Figure 25 Select USB Device Window Configure Serial Port The I O Interface window allows the user to control how the USB controller interacts with the AD95...

Страница 14: ...better choice Typical phase detector frequencies for these applications are 10 MHz to 100 MHz and typical loop bandwidths for this loop filter are 50 kHz to 500 kHz depending on the configuration The...

Страница 15: ...and then click Detect Current Configuration A dialog box appears and acknowledges the I2 C mode and address The evaluation software starts at I2 C Address 0x058 and stops at the first valid I2 C addre...

Страница 16: ...MA 02062 USA Subject to the terms and conditions of the Agreement ADI hereby grants to Customer a free limited personal temporary non exclusive non sublicensable non transferable license to use the Ev...

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