Analog Devices AD9520-0 Скачать руководство пользователя страница 2

UG-076 

Evaluation Board User Guide 

 

Rev. A | Page 2 of 16 

TABLE OF CONTENTS 

Features .............................................................................................. 1

 

Applications ....................................................................................... 1

 

General Description ......................................................................... 1

 

AD9520 Evaluation Board ............................................................... 1

 

Revision History ............................................................................... 2

 

Evaluation Board Hardware ............................................................ 3

 

Power and PC Connections ........................................................ 3

 

Signal Connections ...................................................................... 3

 

Bypassing the Wall Power Supply ............................................... 3

 

Bypassing the PLL (Clock Distribution Only) ............................. 3

 

Using an External VCXO ............................................................ 3

 

Using I

2

C Serial Port Mode ......................................................... 3

 

Evaluation Board Software .............................................................. 4

 

Software Installation .................................................................... 4

 

Running the Software .................................................................. 4

 

Quick Start Guide to the AD9520 PLL .......................................... 5

 

Evaluation Software Components .................................................. 7

 

Main Window ............................................................................... 7

 

PLL Reference Input Window .................................................... 8

 

PLL Configuration Window ....................................................... 8

 

REFMON, STATUS, and LD Buttons ........................................ 8

 

Register W/R Box ..........................................................................9

 

SYNC, PD (Power Down), and RESET Buttons .......................9

 

EEPROM Control Window .........................................................9

 

Reference (R) Divider Window ...................................................9

 

Feedback (N) Divider Window ................................................ 10

 

R and N Delay Window ............................................................. 10

 

Phase Frequency Detector (PFD) Window ............................ 10

 

Charge Pump Setup Window ................................................... 11

 

Zero Delay Window ................................................................... 11

 

VCO Calibration Window ........................................................ 11

 

Channel Divider Window ......................................................... 11

 

Output Driver Window ............................................................. 12

 

Debug Window ........................................................................... 12

 

Evaluation Software Menu Items.................................................. 13

 

Menu Bar ..................................................................................... 13

 

AD9520 PLL Loop Filter ............................................................... 14

 

Using the Evaluation Board to Program an AD9520 on a User 
Board ................................................................................................ 15

 

AD9520 Binary File Generation ................................................... 16

 

Checksum Generation ............................................................... 16

 

Avoiding Checksum Mismatches ............................................. 16

 

 

REVISION HISTORY 

5/2017—Rev. 0 to Rev. A 
Changes to Title and General Description Section ...................... 1 
Changes to Power and PC Connections Section, Signal  
Connections Section, Bypassing the Wall Power Supply Section,  
and Using I

2

C Serial Port Mode Section ........................................ 3 

Changes to Software Installation Section and Running the  
Software Section ............................................................................... 4 
Added Table 1 Caption .................................................................... 5 
Change to Figure 6 Caption ............................................................ 5 
Changes to PLL Reference Input Window Section, PLL  
Configuration Window Section, and REFMON, STATUS, and  
LD Buttons Section ........................................................................... 8 
Changes to SYNC, PD (Power Down), and RESET Buttons  
Section, and Reference (R) Divider Window Section ................. 9 

Changes to Feedback (N) Divider Window Section and R and  
N Delay Window Section .............................................................. 10 
Changes to Channel Divider Window Section........................... 11 
Changes to Output Driver Window Section ............................... 12 
Changes to Load Setup Section, Select Evaluation Board 
Section, Configure Serial Port Section, Debug Section, and 
Operational Modes Menu Section ............................................... 13 
Changes to AD9520 PLL Loop Filter Section ............................. 14 
Changes to Using the Evaluation Board to Program an AD9520 
on a Customer Board Section ....................................................... 15 
Changes to AD9520 Binary File Generation Section and 
Avoiding Checksum Mismatches Section ................................... 16 
 

1/2010—Revision 0: Initial Version 
 

Содержание AD9520-0

Страница 1: ...are very low noise phase locked loop PLL clock synthesizers featuring an integrated voltage controlled oscillator VCO clock dividers and up to 24 outputs The AD9520 product series features automatic...

Страница 2: ...D9520 on a User Board 15 AD9520 Binary File Generation 16 Checksum Generation 16 Avoiding Checksum Mismatches 16 REVISION HISTORY 5 2017 Rev 0 to Rev A Changes to Title and General Description Section...

Страница 3: ...ng is recommended in applications requiring automatic hitless reference switching There is a possibility that the AD9520 receive buffer can chatter when an ac coupled clock stops toggling Connect an o...

Страница 4: ...ing that the evaluation board was found or red text appears indicating that the evaluation board was not found 2 If the evaluation board is found click anywhere in the pop up window with the Evaluatio...

Страница 5: ...p from the PLL MODE box found at the top of the main window see Figure 8 2 Enter the intended reference input frequency in megahertz in the REF 1 MHz box at the upper left corner of the main window 3...

Страница 6: ...f the CHARGE PUMP box However this setting normally does not need to be modified 11 Set the VCO divider by clicking the green VCO box in the center of the main window immediately to the left of the Ca...

Страница 7: ...are listed in the following sections and each of these subsections has its own window From the main window each functional block can be accessed by clicking that block in the main window When a subwi...

Страница 8: ...N WINDOW The PLL Configuration window shown in Figure 11 is opened by clicking the Config PLL button on the main screen The window has three sections SyncB Counter Reset Mode PLL Status Registers and...

Страница 9: ...ssed by clicking the EEPROM button near the lower left corner of the main window 08746 008 Figure 12 EEPROM Control Window To store the current register settings of the AD9520 to the EEPROM click the...

Страница 10: ...der value For example it is not possible to use the internal VCO and a feedback divider of 30 However the R divider can be doubled which allows a feedback divider of 60 The feedback divider window has...

Страница 11: ...king the Cal VCO button in the main window 08746 015 Figure 19 Calibrate VCO Window A valid reference input signal must be present to complete VCO calibration and the VCO must be recalibrated any time...

Страница 12: ...istors on each output This termination scheme is ideal for LVPECL drivers However this scheme degrades the CMOS driver performance Improved CMOS driver performance is achieved by removing the 200 pull...

Страница 13: ...ted evaluation board see Figure 25 08746 019 Figure 25 Select USB Device Window Configure Serial Port The I O Interface window allows the user to control how the USB controller interacts with the AD95...

Страница 14: ...better choice Typical phase detector frequencies for these applications are 10 MHz to 100 MHz and typical loop bandwidths for this loop filter are 50 kHz to 500 kHz depending on the configuration The...

Страница 15: ...and then click Detect Current Configuration A dialog box appears and acknowledges the I2 C mode and address The evaluation software starts at I2 C Address 0x058 and stops at the first valid I2 C addre...

Страница 16: ...MA 02062 USA Subject to the terms and conditions of the Agreement ADI hereby grants to Customer a free limited personal temporary non exclusive non sublicensable non transferable license to use the Ev...

Отзывы: