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Interrupts are generated when the FIFO has room for more
data or when the FIFO becomes empty at the end of
transfer in non-continuous mode.
Interrupt Controlled Channelling Mode (Without FIFO)
Group of channels between one and two are selected in
software. Each group of conversions (scan) initiated by an
interrupt from a particular source. This interrupt can be a
rising edge on the output of counter channel 1, or a rising
edge on PPI port C0 or C3. Data is fed from the PC via a
driver buffer to the enabled DAC channels.
FIFO Wraparound Mode
Group of channels between one and two are selected in
software. Data is fed from the PC to the DAC FIFO until the
desired number of samples has been loaded (a total
maximum of 1024 samples). Each group of conversions
(scan) initiated by timer or external trigger. Data is fed from
the FIFO to the enabled DAC channels and then back to the
FIFO cyclically.
Data Acquisition FIFO mode
If FIFO mode is selected, samples are passed to the DAC via the
1024 sample FIFO.
Analog Output Update Rate
The maximum output update rate may be limited by the
performance of the host PC, the operational mode of the
and the program.
A.1.3
COUNTER / TIMER
Features
82C54 or equivalent counter/timer provides:
Three independent 16 bit counters
Six programmable counter modes, binary or BCD
Internal Clock Source
10 MHz, derived from crystal controlled oscillator or software
selectable
Initial tolerance
±50 ppm
Frequency drift over temp. range
±50 ppm
Clock Divider
Clock pre-scalers provide alternative clock frequencies of 10MHz,
1MHz, 100kHz, 10kHz, 1kHz, or external clock source.
External Clock/Gate Input
The three counter clock inputs, and two counter gate inputs can
be driven by external signals. This signal is referred to digital
ground and must be within the range:
Input Voltage
'0' or Low
–0.3 to +0.8 volts
'1' or High
+2.2 to +5.3 volts
External Clock
10 MHz (max) Square Wave
A TTL compatible signal will normally meet these requirements.
Counter Output
The non-inverted output of counter two OUT2 is available on the
user I/O connector. This output signal is referred to digital ground
and the characteristics are:
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