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4.4.4
Advanced Acquisition Trigger
The /260+ introduces the concept of the acquisition trigger. The acquisition trigger is used
to initiate the acquisition of a number of samples at the pre-programmed sample rate on
occurrence of a trigger event. The samples are stored in the FIFO until the acquisition ends. When
all samples have been taken, the acquisition terminates and the /260+ awaits the next
acquisition trigger event
If more than one channel is enabled the /260+ automatically changes channels each time
a sample is taken.
There are currently two sources of acquisition trigger event:
4.4.5
External Digital Trigger
This new trigger mode will trigger one complete (programmable length) buffer’s worth of sample
data to be acquired from the ADC when the external trigger input to the card becomes active. It
can be configured to be active high or low and edge or level triggered.
4.4.6
Analog Trigger
This new trigger mode will trigger one complete buffer’s worth of sample data to be acquired from
the ADC when the selected analog input crosses a pre-programmed threshold. The trigger can be
configured to become active when the signal is above or below the trigger threshold. This is called
level trigger. Alternatively the trigger can be configured to become active when the signal rises
above or falls below the trigger threshold. This is called edge trigger mode and will suit
oscilloscope type applications amongst others. This trigger mode supports trigger threshold
hysteresis and variable depth pre-trigger sample storage.
4.4.7
Analog Trigger Hysteresis
The analog trigger function, when in edge trigger mode has a variable analog trigger hysteresis
feature. In rising/falling edge trigger mode the analog input must fall/rise below the hysteresis level
before the trigger is armed. Otherwise when the Analog trigger is set to rising edge mode for
example, it would be possible that any noise present on the signal around the falling edge could
cause the trigger to be activated.
4.4.8
Pre-Trigger
The Analog trigger mode supports a variable depth ‘pre-trigger’ function. This allows samples from
before the trigger event to be stored so the user can record the signal immediately prior to the
trigger event. This mode is useful in Oscilloscope type applications.
4.4.9
Automatic offset calibration
The /260+ includes the facility to calculate and calibrate for voltage offsets within the
analog input circuitry. A ‘state machine’ exists within the FPGA that automatically calculates the
zero voltage offset by connecting the differential amplifier inputs together and taking an ADC
sample for each gain setting in both bipolar and unipolar modes. In this way the zero input offset
voltages are calculated for each gain and range setting. These offset values are calculated when
power is applied to the and stored within the FPGA. Offset corrected ADC samples are
calculated during operation.
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