Altigen AltiWare OE 4.0, Руководство администратора

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Configuring the Triton T1/PRI Board
AltiWare OE System Administration Manual 63
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• OOF Errors - the Out Of Frame counter registers every time the T1
chip is forced to re-frame when receiving a frame with severe errors.
• Rec Frame Slips - the Receiver Frame Slips counter shows the
number of frame slips for the receiver.
• Line Code Errors - Line Code Error is defined as an occurrence of a
bi-polar variation or excessive zeroes.
• Bit Errors - Bit Errors are defined as a CRC-6 error in ESF, FT-bit
error in SLC-96 and F-bit or sync bit error in SF.
• Xmt Frame Slips - Transmit Frame Slips counter shows the number
of frame slips for the transmitter.
• Clear button - use the Clear button to reset the statistics counters.
For ideally synchronized systems, Transmit and Receive
Frame Slips counters should be ‘0.’ Continuous update of the
frame slips counters means that transmit and receive
frequencies are not equal. In this case, you should check the system and
MVIP clock setup.
Setting the Configurable Options
• You can set the Frame Type to either SF or ESF
SF (Superframe Format) consists of twelve (12) consecutive frames.
ESF (Extended Superframe Format) consists of twenty-four (24)
consecutive frames.
• You can set the Line Code to either AMI or B8ZS
AMI (Alternate Mark Inversion) is the line coding format in T1
transmission systems whereby successive ones (marks) are alternately
inverted and sent with opposite polarity of the preceding mark. B8ZS
(Binary 8 Zero Substitution) sends two violations of the bipolar line
encoding technique, rather than inserting a one for every seven
consecutive zeros.
• You can set the Zero Code Suppression to None (default setting),
Jam Bit 8, GTE or Bell
Zero Code Suppression inserts a “one” bit to prevent the transmission
of eight or more consecutive “zero” bits; Jam Bit 8 forces every bit 8
to a one; GTE Zero Code Suppression replaces bit 8 of an all zero
channel byte to a one, except in signaling frames where bit 7 is forced