IP-FASTDAC REFERENCE MANUAL
ALPHI TECHNOLOGY CORP.
Page 5
REV 1.0
Part Number : 801-10-00-4000 Copyright ALPHI Technology Corporation, 2000
+/-10Volt Bipolar Offset Code table
Digital Input
Binary Number
In DAC Register
Analog Output
Vout
MSB LSB
1111 1111 1111 1111
1000 0000 0000 0001
1000 0000 0000 0000
0111 1111 1111 1111
0000 0000 0000 0000
Vref (32,767/32,768)
Vref (1/32,768)
0 volt
-Vref (1/32,768)
- Vref
OUTPUT BUFFER
IP-FASTDAC can be configured with either a high speed, high output current (BUF634) or
High speed, low offset voltage (OPA132) input buffers. The specs are below for each
device.
BUF634 ( 250mA High-Speed Input Buffer)
High Output Current : 250mA
Slew Rate : 2000V/us
Wide Bandwidth mode : 180Mhz
Input offset: Typ. = +/- 30 mV
OPA132 ( High Speed OP-AMP)
Output Current : 4.8 mA
Slew Rate : 20V/us
Bandwidth : 8Mhz
Input offset : Typ = +/-0.25mV
