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65
Offset
Name
Field
Bit
Description
0xF1000260 DEFERRED_TRANS Presence_Inq
[0]
Indicates presence of this
feature (read only)
--- [1..4]
SendImage
[5]
Send NumOfImages now
(auto reset)
HoldImg
[6]
Enable/Disable deferred
transport mode
FastCapture
[7]
Enable/disable fast capture
mode
--- [8..15]
FiFoSize
[16..23] Size of FiFo in number of
images (read only)
NumOfImages
[24..31] W: Number of images to
send
R: Number of images in
buffer
9.2.10
Input/Output pin control
All input and output signals running over the HiRose plug are controlled by this
register.
Offset
Name
Field
Bit
Description
0xF1000300
IO_INP_CTRL1
Presence_Inq
[0]
Indicates presence of
this feature (read
only)
---
[1..6]
Polarity
[7]
0: low active, 1: high
active
---
[8..10]
InputMode
[11..15]
Mode
---
[16..30]
PinState
[31]
RD: Current state of
pin
0xF1000304 IO_INP_CTRL2 Same
as
IO_INP_CTRL1
0xF1000308 IO_INP_CTRL3 Same
as
IO_INP_CTRL1
IO_INP_CTRL 1-3
The
Polarity
flag determines whether the input is low active (0) or high active (1). The
input mode
can be seen in the following table. The
PinState
flag is used to query the
current status of the input.
For inputs the
PinState
bit refers to the inverted output side of the optical coupler. This
means that an open input sets the
PinState
bit to “1”.