AEROFLEX GAISLER
79
RT-SPW-ROUTER
Copyright Aeroflex Gaisler AB
June 2012, Version 1.2
8.3
Registers
The core does not implement any registers mapped in the AMBA AHB or APB address space.
8.4
Signal definitions and reset values
The signals and their reset values are described in table 74.
8.5
Timing
The timing waveforms and timing parameters are shown in figure 30 and are defined in table 75.
Table 73. JTAG debug link Data register
32
31
0
SEQ
AHB DATA
32
Sequential transfer (SEQ) - If ‘1’ is shifted in this bit position when read data is shifted out or write
data shifted in, the subsequent transfer will be to next word address.
31 30
AHB Data - AHB write/read data. For byte and half-word transfers data is aligned according to big-
endian order where data with address offset 0 data is placed in MSB bits.
Table 74. Signal definitions and reset values
Signal name
Type
Function
Active
Reset value
dsutck
Input
JTAG clock
-
-
dsutms
Input
JTAG TMS
High
-
dsutdi
Input
JTAG TDI
High
-
dsutdo
Output
JTAG TDO
High
undefined
Table 75. Timing parameters
Name
Parameter
Reference edge
Min
Max
Unit
t
AHBJTAG0
clock period
-
100
-
ns
t
AHBJTAG1
clock low/high period
-
40
-
ns
t
AHBJTAG2
data input to clock setup
falling dsutck edge
15
-
ns
t
AHBJTAG3
data input from clock hold
falling dsutck edge
0
-
ns
t
AHBJTAG4
clock to data output delay
rising dsutck edge
-
25
ns
Figure 30. Timing waveforms
dsutdi, dsutms
dsutck
dsutdo
t
AHBJTAG3
t
AHBJTAG4
t
AHBJTAG2
t
AHBJTAG0
t
AHBJTAG1
