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BIOS Configuration
Chipset Features Setup
This Setup menu controls the configuration of the chipset.
ROM PCI/ISA BIOS
CHIPSET FEATURES SETUP
AWARD SOFTWARE INC.
*Auto Configuration
: Disabled
Power-Supply Type
: AT
:
Spread Spectrum
: Disabled
*DRAM Leadoff Timing
: 11/7/3
Case Open_Warning
: Enabled
*DRAM Read Burst (EDO/FP)
: X444/x444
CPU Warning Temperature
: Disabled
*DRAM Write Burst Timing
: X444
Current System Temp.
: 60°C/140°F
*Fast EDO Lead Off
: Disabled
Current CPU1 Temperature
:
*Refresh RAS# Assertion
: 5 Clks
Current CPUFAN1 Speed
:
*Fast RAS To CAS Delay
: 3
VCORE
:
*DRAM Page Idle Timer
: 2 Clks
3.3 V
:
+ 5 V
:
*DRAM Enhanced Paging
: Enabled
+12V
:
- 12 V
: -
*Fast MA to RAS# Delay
: 2 Clks
*SDRAM(CAS Lat/RAS-to-CAS)
: 2/2
*SDRAM Speculative Read
: Disabled
System BIOS Cacheable
: Disabled
Video BIOS Cacheable
: Disabled
8 Bit I/O Recovery Time
: NA
ESC : Quit
á
â
à
ß
: Select Item
16 Bit I/O Recovery Time
: NA
F1 : Help
PU/PD/+/- : Modify
Memory Hole At 15M-16M
: Disabled
F5 : Old Values
(Shift) F2 : Color
F6 : Load BIOS Defaults
Auto Detect DIMM/PCI Clk
: Enabled
F7 : Load Setup Defaults
Note:
The items that be marked in this menu are show-only. The system
manufacturer for high performance configures the item value.
System BIOS Cacheable
When this function is enabled, the BIOS ROM’s addresses at
F0000H-FFFFFH will be duplicated into the SRAM. It will work with the
cache controller that is enabled.
Enabled
<Default>
BIOS access cached
Disabled
BIOS access not cached
Video BIOS Cacheable
As with caching the system BIOS above, enabling the Video BIOS cache
will cause access to video BIOS addressed at C0000H to C7FFFH to be
cached, it the cache controller is also enabled.
Enabled
<Default>
Video BIOS access cached
Disabled
Video BIOS access not cached
Содержание NuPRO-598 Series
Страница 2: ......
Страница 6: ......
Страница 8: ...ii Table of Contents Product Warranty Service 82...
Страница 16: ...8 Introduction Figure 1 Layout of key components JP4...
Страница 17: ...Introduction 9 Figure 2 NuPRO 598 Mechanical Drawing...
Страница 20: ...12 Installations Figure3 Jumper Locations on the NuPRO 598 JP4 JP13...
Страница 24: ...16 Installations JP9 CPU Core voltage VCORE JP9 1 9V 2 0V 2 1V 2 2V...
Страница 25: ...Installations 17 VCORE JP9 2 3V 2 4V 2 8V JP4 JP5 CPU VI O JP4 JP5 Voltage 1 3 1 3 2 5V 1 3 1 3 3 3V...
Страница 27: ...Installations 19 Figure 4 Connector Locations on the NuPRO 598 JP4...