IP482 Industrial I/O Pack User’s Manual Counter Timer Module
___________________________________________________________________
________________________________________________________________________________________
Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:[email protected] http://www.acromag.com
45
9 Read Back Register is 8, since there were eight high pulses during one
InA period. The period of the clock is calculated by taking the inverse of the
frequency of the clock. For this example, the frequency was 250KHz.
Therefore, the clock period is 1/250KHz, which is equal to 4
s. The clock
period multiplied by the Read Back Register 4
s x 8, is equal to 32
s (the
period of the InA waveform). This value may be in error by
1 clock period.
Note that the InA and InC inputs run off the internal 8MHz (or 32MHz)
clock. Those signals may not be synchronous with the selected clock. The
output pulse is active for 1.75
s. If debounce was enabled, the output pulse
will occur 2.5
s after the completion of the input signal. Additionally, the
counter must be re-triggered before any further measurements take place.
For more information, see the Input Period Measurement description.
One-Shot Pulse Mode Example
The objective for this example is to use the One-Shot Pulse mode using
16-bit Counter 9. The output pulse is active high with the low portion 20
s
long and the high portion 5
s long. Additionally, the counter has an
external clock, an active high Gate-off signal, and an active high External
Trigger. Interrupts are enabled. Assume the external clock has a frequency
of 200KHz.
1. Connect the inputs/output to the following pins (unpowered):
Pin # Connection
Description
9
In9_A(+)
Gate-Off
19
In9_B(+)
Ext. Clock
29
In9_C(+)
Ext. Trigger
41
Out9(+)
Output
2. Write the following information, 966FH, to Counter 9 Control Register
located at base address plus an offset of 18H.
Bits
Logic
Operation
2,1,0
111
Sets the counter to One-Shot Pulse generation mode.
3
1
Sets the output to active high.
5,4
10
Sets the Gate-Off input (InA) to active high.
7,6
01
Enables the external clock input (InB).
9,8
10
Enables the external Trigger Input (InC) to active high.
12,11,10
101
Sets the clock to an external source.
13
0
Disables input debounce on InA and InC.
14
0
Not used.
15
1
Enables interrupts.
3. Write the 16-bit value 4H to Counter 9 Constant A Register located at
base address plus an offset 40H for the non-active portion of the pulse, and
1H to Counter 9 Constant B Register located at base address plus an offset
54H for the active portion of the pulse.
PROGRAMMING
EXAMPLES
Table 3.32:
One-Shot Pulse
Pin Assignments for Counter 9
Note: Make sure all inputs
and outputs are properly
grounded.
Table 3.33:
One-Shot Pulse
Control Register 9 Settings
