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AXM-VFX-EDK User’s Manual                                                          Mezzanine Board 

___________________________________________________________________ 

________________________________________________________________________

 

Acromag, Inc.  Tel:248-295-0310  Fax:248-624-9234  Email:[email protected]  http://www.acromag.com 

19

Radiated Emissions:

  Meets or exceeds European Norm EN50081-1 for 

class B equipment.  Shielded cable with I/O connections in shielded 

enclosure are required to meet compliance.  

 

Mean Time Between Failure:

 Contact the Factory. 

 

 

Channel Configuration:

  42 Channels (AXM-VFX-EDK) Bi-directional 

LVTTL signals are independently direction controlled. 

 

Reset/Power Up Condition:

  All Digital Channels Default to Input. 

 

LVTTL I/O Characteristics:

  Due to the direct connections from the Field 

I/O to the FPGA, all I/O characteristics for LVTTL are determined by the 

FPGA.  Refer to the FPGA documentation for 3.3V signaling for further 

information. 

 

SPECIFICATIONS 

Reliability Prediction 

LVTTL I/O 

Содержание AXM-VFX-EDK

Страница 1: ...NCORPORATED Tel 248 295 0310 30765 South Wixom Road Fax 248 624 9234 P O BOX 437 Wixom MI 48393 7037 U S A solutions acromag com Copyright 2009 Acromag Inc Printed in the USA Data and specifications a...

Страница 2: ...iguration 6 AXM VFX EDK Front I O 7 Non Isolation Considerations 8 3 0 PROGRAMMING INFORMATION MEMORY MAP 9 Board Status and Reset Register 10 Differential I O Registers 11 Differential Direction Cont...

Страница 3: ...____________________________ Acromag Inc Tel 248 295 0310 Fax 248 624 9234 Email solutions acromag com http www acromag com 3 6 0 SPECIFICATIONS PHYSICAL 18 ENVIRONMENTAL 18 LVTTL INPUT OUTPUT 19 DRAW...

Страница 4: ...G LVTTL RS232 Xilinx Std JTAG 34 Pin 0 1 Header Two DP9 0 C to 70 C Digital Input Output Channels Thirty 3 3 volt LVTTL CMOS compliant input output channels which can be configured as input or output...

Страница 5: ...board allows programming via the JTAG interface program display and general program debug and development Refer to the PMC base board s manual for further information on the available Engineering Desi...

Страница 6: ...ements of the system boards plus the installed Acromag board within the voltage tolerances specified Adequate air circulation must be provided to prevent a temperature rise above the maximum operating...

Страница 7: ...talled This allows for full end user customization These pins correspond to the 12 channels of Digital I O on the AXM D03 module Refer to the Digital I O Register section for further information The c...

Страница 8: ...AUX Channel 11 4 AUX Channel 4 5 Not Available 5 AUX Channel 5 6 Not Available 6 AUX Channel 6 7 Not Available 7 AUX Channel 7 8 Not Available 8 9 Pin DSUB Connections Pin Description Connections Pin...

Страница 9: ...gister and Software Reset2 8000 8007 29 0 EDK I O Register3 8004 800B Direction Register EDK Channels 29 03 8008 800F 15 0 Digital I O Register3 800C 8013 Direction Register Digital Channels 15 03 801...

Страница 10: ...ter reflect the status of each of the Differential I O channels 8 to 15 A Read of this bit reflects the interrupt pending status Read of a 1 indicates that an interrupt is pending for the correspondin...

Страница 11: ...els are set by writing to this register Note that the data direction input or output must first be set via the Differential Direction register at PCIBAR2 plus 8008H D31 D30 D29 D28 D27 D26 D25 Not Use...

Страница 12: ...tion of each channel is controlled by its corresponding data bit Data bit use varies depending on the module selected The bit mapping corresponds to the Differential and EDK I O Register Independent c...

Страница 13: ...use 8 bit 16 bit or 32 bit data transfers with the lower ordered bits corresponding to the lower numbered channels for the register of interest All input output channels are configured as inputs follo...

Страница 14: ...D1 D0 VFX EDK I O 15 I O 14 I O 13 I O 12 I O 11 I O 10 I O 9 I O 8 Interrupt Type COS or H L Configuration Register Read Write PCIBAR2 8018 The Interrupt Type Configuration Register determines the ty...

Страница 15: ...ata register A 1 bit means that an interrupt will occur when the input channel is high i e a 1 in the differential input channel data register Note that no interrupts will occur unless they are enable...

Страница 16: ...AXM D02 the 22 differential I O on the AXM D03 and 30 LVDS I O on the AXM D04 The 16 auxiliary I O map to the 16 differential signal on the AXM D03 Note that regardless of which AXM D module is being...

Страница 17: ...Also refer to the documentation of your carrier CPU board to verify that it is correctly configured Replacement of the board with one that is known to work correctly is a good technique to isolate a f...

Страница 18: ...150 C Non Isolated Logic and field commons have a direct electrical connection Radiated Field Immunity RFI Complies with EN61000 4 3 3V m 80 to 1000MHz AM 900MHz keyed and European Norm EN50082 1 with...

Страница 19: ...able with I O connections in shielded enclosure are required to meet compliance Mean Time Between Failure Contact the Factory Channel Configuration 42 Channels AXM VFX EDK Bi directional LVTTL signals...

Страница 20: ...NYLON SCREWS x2 PMC CONNECTOR MEZZANINE CONNECTOR COMPONENTSIDEOFAXMMODULE 4 THE SCSI CONNECTOR CAN BE FURTHER SECURED TO THE BOARD WITH 2 ADDITIONAL SCREWS D 3 SECURE THE AXM MODULE WITH NYLON STAND...

Страница 21: ...________________________ ________________________________________________________________________ Acromag Inc Tel 248 295 0310 Fax 248 624 9234 Email solutions acromag com http www acromag com 21 12 2...

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