
AXM-VFX-EDK User’s Manual Mezzanine Board
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Acromag, Inc. Tel:248-295-0310 Fax:248-624-9234 Email:[email protected] http://www.acromag.com
12
Differential Direction Control Register (Read/Write) –
(
PCIBAR2
+ 8008H)
The data direction (input or output) of the differential channels is selected
via this register at the carrier P 8008H. This includes the direction
of all 30 general purpose LVTTL channels on the AXM-EDK. The direction
of each channel is controlled by its corresponding data bit. Data bit use
varies depending on the module selected. The bit mapping corresponds to
the Differential and EDK I/O Register.
Independent channel direction control is provided for each differential
channel. Setting a bit low configures the corresponding channel data
direction for input. Setting the control bit high configures the corresponding
channel data direction for output.
The default power-up state of these registers is logic low. Thus, all
channels are configured as inputs following system reset or power-up.
Reading or writing to this register is possible via 32-bit, 16-bit or 8-bit data
transfers. Data-bits 30 and 31 are not used and will return 0 when read.
DIFFERENTIAL
INPUT/OUTPUT
REGISTERS