Acorn BBC Master 128, Руководство по обслуживанию

Страница: 38 / 87

Master Series Service Manual
7 Check that the system ROM is plugged in.
8 Check the RAS and CAS signals to the main DRAMs, ICs 17 and 23, pin
5 (RAS) and pin 16 (CAS).
The main DRAM timing is shown in figure 8.
Figure 8 DRAM timing
RAS and CAS should be good 4MHz square waves. If one or both is
missing then check for shorted tracks. Remember the DRAMs can be
destroyed if RAS is stuck low.
RAS is generated from 4M and 8M by the D-type IC28 pin 9.
CAS for the main DRAMs is generated from 2M, inverted by a NAND in
IC34 to give phi2 IN, gated with DRAMEN which enables the main RAM,
and finally gated with 4M through another NAND in IC34.
9 Check that the auxiliary DRAM CAS line, when inverted at IC36 pin 8
is low. If it is high at this point then it will suppress the main
DRAMs.
10 Check the multiplexed address lines into the main DRAMs, ICs 17 and
23 pins 6 7 8 10 11 12 13 and 14. The address lines should switch
after RAS, with an approximate 20ns hold time as shown in figure 8.
Also check that the address lines are correctly switching after phi2,
as shown in figure 8.
If any of the DRAM timing is found to be out of specification then
check that C26 is fitted and is the correct value.
33 Issue 1