Master Series
Service Manual
A 10uf capacitor is connected across the clock chip supply
connections. This is to prevent loss of data in the event of
accidental battery disconnection.
Configuration Status:- Fifty bytes of CMOS RAM are available within
the chip. Twenty of these are used by the operating and filing systems
for initial configuration of the hardware. Of the remainder, ten are
reserved for future use by ACORN, ten are for 'Third Party' use and
the remainder are for the user.
Clock:- The clock operates from a 32.768KHz crystal oscillator. A
trimming capacitor is provided as is a test point with the buffered
clock output. Year, month, day, hour, minute and second information is
provided with automatic leap year (but not automatic leap century)
correction. An alarm is also included within the chip, but operating
system support to this facility is not provided. An optional nIRQ
connection can be made to the CPU from the clock chip, enabling the
alarm to change program flow. Operation of the clock chip in this
manner involves direct manipulation of the chip control signals and
should only be attempted by competent programmers. Acorn Computers are
not responsible for incorrect programming by the user/software
supplier.
If power is removed during an access to this chip, the chip select
will become invalid. This cannot however remove the possibility of
write accesses being corrupted. This is done by inverting the chip
select with a transistor whose collector resistor is connected to the
battery backed supply. As power fails to the main circuitry, the
transistor base current reduces and the transistor switches off
deselecting the chip.
1 MHz Internal I0:- Various devices operate at a 1MHz bus rate. Only
one internal I/O component works at this speed - the system VIA.
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