Master Series
Service Manual
This is achieved by providing a filing system workspace as follows:-
* Bit Y in ACCCON when set, causes 8 Kbyte of RAM referred to as HAZEL
to be overlayed on the MOS VDU drivers, i.e. from &C000 to &DFFF.
Clearly, when this bit has been set, no calls may be made to the MOS
for VDU operation. The code which performs this paging operation is
responsible for resetting the Y bit, as no hardware is provided for
this purpose.
The remaining bits in ACCCON are used to control various peripheral
systems:-
* The bit ITU in ACCCON when set enables the CPU to access the
internal second processor rather than the external one.
* The bit IRR in ACCCON is InterRupt Request. When set, this bit
causes an open drain output to pull the CPU NIRQ pin down to Vss.
ROMSEL
The contents of ROMSEL determine the paging of memory in the 16K
region &8000 to &BFFF. One of sixteen, unique 16 Kbyte ROM memory
segments may be selected. One additional 4 Kbyte RAM segment may be
selected from &8000 to &8FFF.
Eight of the segments are assumed to be in four, 32 Kbyte ROMs where
the least significant bit of ROMSEL selects between the upper and
lower segments. Seven of the segments exist together with a ROM which
is active from &C000 to &FFFF, within a 128 Kbyte ROM. This ROM is
connected via a separate data bus. The four, 32 Kbyte devices and one,
16 Kbyte device are connected in a matrixing scheme as shown in figure
3.
Figure 3
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