Abov MC96F6332D, Руководство пользователя

Страница: 68 / 327

MC96F6432
68 June 22, 2018 Ver. 2.9
Table 8-2 SFR Map (Continued)
Address Function Symbol R/W
@Reset
7 6 5 4 3 2 1 0
E0H Accumulator Register ACC R/W 0 0 0 0 0 0 0 0
E1H USI0 Status Register 1 USI0ST1 R/W 0 0 0 0
– 0 0 0
E2H USI0 Status Register 2 USI0ST2 R 0 0 0 0 0 0 0 0
E3H USI0 Baud Rate Generation Register USI0BD R/W 1 1 1 1 1 1 1 1
E4H USI0 SDA Hold Time Register USI0SHDR R/W 0 0 0 0 0 0 0 1
E5H USI0 Data Register USI0DR R/W 0 0 0 0 0 0 0 0
E6H USI0 SCL Low Period Register USI0SCLR R/W 0 0 1 1 1 1 1 1
E7H USI0 SCL High Period Register USI0SCHR R/W 0 0 1 1 1 1 1 1
E8H Reset Flag Register RSTFR R/W 1 x 0 0 x
– – –
E9H USI1 Control Register 1 USI1CR1 R/W 0 0 0 0 0 0 0 0
EAH USI1 Control Register 2 USI1CR2 R/W 0 0 0 0 0 0 0 0
EBH USI1 Control Register 3 USI1CR3 R/W 0 0 0 0 0 0 0 0
ECH USI1 Control Register 4 USI1CR4 R/W 0
– – 0 0 – 0 0
EDH USI1 Slave Address Register USI1SAR R/W 0 0 0 0 0 0 0 0
EEH P3 Function Selection Register P3FSR R/W 0 0 0 0 0 0 0 0
EFH P4 Function Selection Register P4FSR R/W
– 0 0 0 0 0 0 0
F0H B Register B R/W 0 0 0 0 0 0 0 0
F1H USI1 Status Register 1 USI1ST1 R/W 0 0 0 0
– 0 0 0
F2H USI1 Status Register 2 USI1ST2 R 0 0 0 0 0 0 0 0
F3H USI1 Baud Rate Generation Register USI1BD R/W 1 1 1 1 1 1 1 1
F4H USI1 SDA Hold Time Register USI1SHDR R/W 0 0 0 0 0 0 0 1
F5H USI1 Data Register USI1DR R/W 0 0 0 0 0 0 0 0
F6H USI1 SCL Low Period Register USI1SCLR R/W 0 0 1 1 1 1 1 1
F7H USI1 SCL High Period Register USI1SCHR R/W 0 0 1 1 1 1 1 1
F8H Interrupt Priority Register 1 IP1 R/W
– – 0 0 0 0 0 0
F9H Reserved
– – –
FAH Flash Sector Address High Register FSADRH R/W
– – – – 0 0 0 0
FBH Flash Sector Address Middle Register FSADRM R/W 0 0 0 0 0 0 0 0
FCH Flash Sector Address Low Register FSADRL R/W 0 0 0 0 0 0 0 0
FDH Flash Identification Register FIDR R/W 0 0 0 0 0 0 0 0
FEH Flash Mode Control Register FMCR R/W 0
– – – – 0 0 0
FFH P5 Function Selection Register P5FSR R/W
– – 0 0 0 0 0 0