Abov MC96F6332D, Руководство пользователя

Страница: 155 / 327

MC96F6432
June 22, 2018 Ver. 2.9 155
11.8.4 8-Bit Timer 3, 4 Capture Mode
The 8-bit Capture 3 and 4 mode is selected by control register as shown in Figure 11.32.
The timer 3, 4 capture mode is set by T3MS, T4MS as
‘1’. The clock source can use the internal/external clock.
Basically, it has the same function as the 8-bit timer/counter mode and the interrupt occurs when T3CNT, T4CNT
is equal to T3DR, T4DR. The T3CNT, T4CNT value is automatically cleared by match signal.
This timer interrupt in capture mode is very useful when the pulse width of captured signal is wider than the
maximum period of timer.
The capture result is loaded into T3CAPR, T4CAPR. In the timer 3, 4 capture mode, timer 3, 4 output (T3O,
T4O) waveform is not available.
According to the EIPOL0L register setting, the external interrupt EINT0 and EINT1 function is chose. Of course,
the EINT0 and EINT1 pins must be set to an input port.
The T3CAPR and T3DR are in the same address. In the capture mode, reading operation reads T3CAPR, not
T3DR and writing operation will update T3DR. The T4CAPR has the same function.