10.9.1.1
Testing the synchronizing function
The voltage inputs used are:
UP3LN1
UL1, UL2 or UL3 line 1 voltage inputs on the IED
UP3BB1
Bus1 voltage input on the IED
Testing the frequency difference
The frequency difference test should verify that operation is achieved when the
frequency difference between bus and line is less than set value of
FreqDiffMax
and
above set value of
FreqDiffMin
. The test procedure below will depend on the settings
used. Input STARTSYN must be activated during the test.
FreqDiffMax
= 50.2 Hz
FreqDiffMin
= 50.01 Hz
tBreaker
= 0.080 s
1.
Apply voltages
1.1. U-Line = 100%
UBaseLine
and f-Line = 50.0 Hz
1.2. U-Bus = 100%
UBaseBus
and f-Bus = 50.15Hz
2.
Check that a closing pulse is submitted at a closing angle equal to calculated
phase angle value from the formula below. Modern test sets will evaluate this
automatically.
Closing Angle = |( (f
Bus
– f
Line
) * tBreaker * 360 degrees) |
f
Bus
= Bus frequency
f
Line
= Line frequency
tBreaker = Set closing time of the breaker
3.
Repeat with
3.1. U-Bus = 100%
UBaseBus
and f-bus = 50.25 Hz, to verify that the function
does not operate when frequency difference is above limit.
4.
Verify that the closing command is not issued when the frequency difference is
less than the set value
FreqDiffMin
.
10.9.1.2
Testing the synchrocheck check
During the test of SESRSYN for a single bay arrangement, these voltage inputs are
used:
U-Line
UL1, UL2 or UL3 line 1 voltage input on the IED according to the connection in SMT
U-Bus
Bus voltage input on the IED according to the connection in SMT
1MRK 511 360-UEN A
Section 10
Testing functionality by secondary injection
Bay control REC670 2.1 IEC
143
Commissioning manual
Содержание Relion REC670
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