TECHNICAL MANUAL
620020E05
Due to the continuous products improvement, the indications of the present manual can be modified without previous warning and in any case
are a contract commitment. The present information publishing does not represent resignation of intellectual property or patent.
Copyright
2009-2010 S.A. Sistel -E 08211 BARCELONA
Pag. 20
ON
1 2 3 4 5 6 7 8
ON=1
OFF=0
00 = 50 kB/s
01 = 125 kB/s
10 = 100 kB/s
11 = 250 kB/s
8.1.3 YAV module address
The logic address is composed by 2 elements: the module identification and the hardware
address.
The hardware address is selected by switches 3 to 8 of SW1, being 3 the least significant bit
(LSB). The module identification is contained in the module firmware and cannot be changed.
There is a different identification for each YAV module type. Therefore, modules of different
module identification can have the same hardware address.
Since there are 6 bits there are up to 64 possible addresses (from 0 to 63).
ON
1 2 3 4 5 6 7 8
ON=1
OFF=0
LSB
MSB
Board Address
8.2 YAV modules standard addressing & Virginia Panel Receivers
Although the user can set any address for his modules, 6TL defines standard addressing for the
modules that are installed by default in 6TL testing platforms.
The motivation is to ease compatibility between platforms and systems and 6TL strongly
recommends following this standard in order to facilitate platforms setup and maintenance.
The following table shows the standard addressing for the YAV modules and 6TL products
installed in the different slots of the Virginia Panel receivers:
