Index
iv
boot sequence, system configuration
Getting Started
Operating System Installation .................................................................................................. 19
System Configuration Overview............................................................................................... 17
bus interface (see STD 32 bus interface)
Introduction
Functional Blocks, STD 32 Bus Interface .................................................................................. 5
bus loading characteristics and tables
Specifications
Electrical and Environmental, STD Bus Loading Charac., Intro. ............................................. 94
Electrical and Environmental, Table--STD Bus Loading, E Connector.................................... 95
Electrical and Environmental, Table--STD Bus Loading, P Connector.................................... 94
BUSRQ*
System Registers
System Registers, System Register 0 ..................................................................................... 75
- C -
cable
Specifications
Mechanical, Cable ................................................................................................................. 104
cables
Specifications
Cable, Illus--ZT 90205 Multi-I/O Cable .................................................................................. 104
cache memory
Introduction
Functional Blocks, Pentium Processors .................................................................................... 5
Specifications
Mechanical, Connectors, J1 (L2 Cache Module) ..................................................................... 99
calendar
Real-Time Clock
Real-Time Clock Overview ...................................................................................................... 57
card dimensions and weight
Specifications
Mechanical, Card Dimensions And Weight ............................................................................. 96
clear byte register (DMA controller)
DMA Controller
DMA Controller Registers, Clear Byte Register ....................................................................... 54
clear mask register (DMA controller)
DMA Controller
DMA Controller Registers, Clear Mask Register ..................................................................... 54
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