Pin
No.
Port Name
Use
Port
Function
Name
Terminal
Processing
Related Power Supply
Detail of Function
OFF
ON
I/O Logic I/O Logic
32
IIO1_2/RXD8/W/
TA2IN/P7_5
TA2IN
DIR1_
DSP1_N_
INT
10kPU
DSP_PON
O
Low
I
L act DIR1/DSP1 interr
u
pt
33
IIO1_1/CLK8/W/
TA2OUT/P7_4
P7_4
STBY_LED
AC
O
Low
O
H act Standby LED control for high q
u
ality model
34
IIO1_0/TXD8/
SS2/RTS2/
CTS2/V/TA1IN/
P7_3
TA1IN
DOCK_N_
DET
AC
O
Low
I
L act iPod detect
35
CLK2/V/
TA1OUT/P7_2
P7_2
+44V_PON
47kPD
DSP_PON
O
Low
O
H act FL driver power s
u
pply
36
MSCL/IEIN/
ISRXD2/
OUTC2_2/
IIO1_7/STXD2/
SCL2/RXD2/
TA0IN/TB5IN/
P7_1
RXD2
DOCK_
MISO
S
u
ction
prevention
when AC is
t
u
rned off
DOCK_
PON
O
Low
I
Data DOCK reception data
37
TA0OUT/
TXD2/SDA2/
SRXD2/IIO1_6/
OUTC2_0/
ISTXD2/IEOUT/
MSDA/P7_0
TXD2
DOCK_
MOSI
DOCK_
PON
O
Low
O
Data DOCK transmission data
38
TXD1/SDA1/
SRXD1/P6_7
TXD1
DBG_MOSI
100kPU
AC
O
Low
O
Data Deb
u
g/E8a
39 VCC
VCC
VCC
---
40
RXD1/SCL1/
STXD1/P6_6
RXD1
DBG_MISO
100kPU
AC
O
Low
I
Data Deb
u
g/E8a
41 VSS
VSS
VSS
---
42 CLK1/P6_5
CLK1
DBG_CLK
100kPU
AC
O
Low
I
Clock E8a
43
CTS1/RTS1/
SS1/OUTC2_1/
ISCLK2/P6_4
P6_4
DBG_BUSY
AC
O
Low
O
E8a
44
TXD0/SDA0/
SRXD0/P6_3
P6_3
MT_N_SB_
PO
100kPD
+3.3S_PON
O
Low
O
L act M
u
te SB (PREOUT)
45
TB2IN/RXD0/
SCL0/STXD0/
P6_2
RXD0
NCPU_
PIC_MOSI
NET_PON
O
Low
I
Data Network mod
u
le image receive data
46
TB1IN/CLK0/
P6_1
CLK0
NCPU_
PIC_CLK
NET_PON
O
Low
I
Clk
Network mod
u
le image clock
47
TB0IN/CTS0/
RTS0/SS0/P6_0
TB0IN
NPGA_N_
INT
HDMI_PON
O
Low
I
L act Interr
u
pt from NPGA
48
D31/OUTC2_7/
P13_7
P13_7 MT_N_HP
100kPD
+3.3S_PON
O
Low
O
L act M
u
te headphone
49
D30/OUTC2_1/
ISCLK2/P13_6
P13_6 MT_N_Z3
100kPD
+3.3S_PON
O
Low
O
L act M
u
te Zone3/Rear Presence (PREOUT)
50
D29/OUTC2_2/
ISRXD2/IEIN/
P13_5
P13_5 MT_N_Z2
100kPD
+3.3S_PON
O
Low
O
L act M
u
te Zone2/Front Presence (PREOUT)
51
D28/OUTC2_0/
ISTXD2/IEOUT/
P13_4
ISTXD2 IR_OUT
AC
O
Low
O
Data Remote control code o
u
tp
u
t
52
RDY/CS3/CTS7/
RTS7/P5_7
RDY
NC(RDY)
HDMI_PON
O
Low
B
B
u
s
External b
u
s
53
ALE/CS2/RXD7/
P5_6
CS2
DFF_N_CS
HDMI_PON
O
Low
B
B
u
s
External b
u
s
54
HOLD/CLK7/
P5_5
P5_5
DBG_EPM
22kPU and
3.3kPD
AC
I
---
I
E8a
55
HLDA/CS1/
TXD7/P5_4
CS1
FLASH_N_
CS
HDMI_PON
O
Low
B
B
u
s
External b
u
s
56
D27/OUTC2_3/
P13_3
P13_3
MT_N_SB_
MI
100kPD
+3.3S_PON
O
Low
O
L act M
u
te s
u
rro
u
nd back (Main amp inp
u
t)
57 VSS
VSS
VSS
---
58
D26/OUTC2_6/
P13_2
P13_2 MT_DA
DSP_PON
O
Low
O
H act M
u
te digital a
u
dio
80
RX-V1
067/HTR-8063/
RX-A1
0
0
0
RX-V1067/HTR-8063/RX-A1000
DRAFT
Summary of Contents for HTR-8063
Page 25: ...25 RX V1067 HTR 8063 RX A1000 RX V1067 HTR 8063 RX A1000 MEMO DRAFT ...
Page 180: ... ADVANCED SETUP RX V1067 HTR 8063 RX A1000 181 DRAFT ...
Page 181: ...RX V1067 HTR 8063 RX A1000 182 DRAFT ...
Page 182: ...RX V1067 HTR 8063 RX A1000 183 DRAFT ...
Page 183: ... 本機の設定を変更する RX V1067 HTR 8063 RX A1000 184 DRAFT ...
Page 184: ...185 RX V1067 HTR 8063 RX A1000 RX V1067 HTR 8063 RX A1000 DRAFT ...
Page 185: ...RX V1067 HTR 8063 RX A1000 DRAFT ...
