GX-700/GX-700VCD
GX-700/VCD
IC5 : MN662741RPB1 [P.C.B. CD/VCD]
Signal Processor & Controller
27
Pin No.
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
Function
Reference voltage for D/A output section (TVD, ECS, TRD, FOD, FBAL, TBAL, TOFS)
Focus balance adjustment output
Tracking balance adjustment output
Focus error signal input
(Analog input)
Tracking error signal input
(Analog input)
RF envelope signal input
(Analog input)
Vibration detection signal input
H : Detect
Off track signal input
H : Off track
Track cross signal input
RF detection signal input
L : Detect
Drop out signal input
H : Drop out
Laser ON signal output
H : ON
Tracking error shunt signal output
H : Shunt
Play signal output
H : PLAY
(NC)
Double speed status signal output
L : Double speed
(NC)
RF signal input
Reference current input pin
Bias pin for DSL
(NC)
DSL loop filter pin
PLL loop filter pin
VCO loop filter pin
(NC)
Power supply for analog circuits (For DSL, PLL, A/D input blocks, and D/A output blocks)
(+5)
GND for analog circuits (For DSL, PLL, A/D input blocks, and D/A output blocks)
(GND)
EFM signal output
At IOSEL = H : EFM signal output
At IOSEL = L : 16.9344 MHz clock output (*1)
PLL extraction clock output
(f
PCK
= 4.32MHz)
(NC)
Tracking offset adjustment output
(NC)
Sub-code serial output
Clock input for sub-code serial output
(With pull-up resistor)
GND for oscillation circuit
Crystal oscillation circuit input pin
(f = 16.9344MHz, 33.8688MHz)
Crystal oscillation circuit output pin
(f = 16.9344MHz, 33.8688MHz)
Power supply for oscillation circuit
(+5)
At IOSEL = H : Byte clock signal output
At IOSEL = L : Traverse stop signal output
H : STOP mode
(*1)
Sub-code frame clock signal output
(f
CLDCK
= 7.35kHz)
Crystal frame clock signal output
(f
FCLK
= 7.35kHz)
(NC)
Interpolation flag signal output
H : Interpolation
Flag signal output
(NC)
Spindle servo phase synchronous status signal outut
H : CLV
L : Rough servo
(NC)
Sub-code CRC check result output
H : OK
L : NG
(NC)
De-emphasis detection signal output
H : ON
(NC)
At IOSEL = H : Frame resynchronizing signal RESY output
H : Synchronous
L : Asynchronous
(*1)
At IOSEL = L : Error correction, and deinterleave RAM address reset signal FLAG6 output
L : Address reset generated
Mode selector pin
(*1)
Test pin
(Normal : H)
(+5)
Power supply for analog circuits
(For audio output section) (Commonly used for L-ch and R-ch)
L-ch audio output
GND for analog circuits
(For audio output section) (Commonly used for L-ch and R-ch)
R-ch audio output
RF signal polarity specification pin When the bright level is “H”, RSEL = H When the bright level is “L”, RSEL = L
Crystal oscillation frequency specification pin (H : Crystal osillation frequency = 33.8688 MHz, L : Crystal osillation frequency = 16.9344 MHz)
At IOSEL = H : Test pin (Normally L)
At IOSEL = L : SRDATA input
(*1)
At IOSEL = H : SMCK pin output frequency selector pin
H : SMCK = 8.4672MHz , L : SMCK = 4.2336MHz
At IOSEL = L : LRCK input
H : L-ch data, L : R-ch data
SMCK = Fixed at 4.2336 MHz
(*1)
At IOSEL = H : SUBQ pin output mode selector pin
H : Q-code buffer working mode
(*1)
At IOSEL = L : BCLK input
Q-code buffer mode fixed
I/O
I
O
O
I
I
I
I
I
I
I
I
O
O
O
O
I
I
I
I/O
I/O
I/O
I
I
O
O
O
O
I
I
I
O
I
O
O
O
O
O
O
O
O
O
I
I
I
O
I
O
I
I
I
I
I
Name
VREF
FBAL
TBAL
FE
TE
RFENV
VDET
OFT
TRCRS
RFDET
BDO
LDON
TES
PLAY
WVEL
ARF
IREF
DRF
DSLF
PLLF
VCOF
AVDD2
AVSS2
EFM
PCK
TOFS
SUBC
SBCK
VSS
X1
X2
VDD
BYTCK
CLDCK
FCLK
IPFLAG
FLAG
CLVS
CRC
DEMPH
RESY
IOSEL
TEST
AVDD1
OUTL
AVSS1
OUTR
RSEL
CSEL
PSEL
MSEL
SSEL
*1 These models used "L".
