USB Audio 2.0 Reference Design, XS1-L1 Edition Hardware Manual (1.0) 11/18
11
Audio Clocking [K]
The audio USB endpoints are configured in asynchronous mode. This means that the
board acts as the audio clock master and the host as the slave. This has the benefit
that a simple crystal oscillator can be used to generate the audio master clock which
typically results in lower jitter and consequently higher quality audio.
Two crystal oscillators are used on the board to support the two standard sample rate
base frequencies (44.1 and 48kHz). The crystal oscillators are built using discrete
components for low cost and easy availability however standard canned oscillators
could also be used. The oscillator design is a simple Pierce oscillator using an
unbuffered inverter as the amplifying component. The MCLK_SEL signal selects which
of the two oscillators is enabled, only one is enabled at any one time to avoid any
interference from the unused clock.
The behaviour of this select signal is shown below:
MCLK_SEL
Audio master clock frequency
0
11.2896MHz
1
24.576MHz
The audio master clock is connected to a 1-bit port of the XS1-L1 so that all of the I
2
S
outputs are synchronised with it. This also allows the S/PDIF output to be generated
from a buffered 1-bit port clocked by the audio master clock input.
The MCLK_SEL signal is mapped to bit 2 of port 32A on the processor as shown in
the port map.
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