Xilinx ML605, User Manual, Page: 51 / 92

ML605 Hardware User Guide www.xilinx.com 51
UG534 (v1.2.1) January 21, 2010
Detailed Description
User SMA GPIO
The ML605 includes an pair of SMA connectors for GPIO as described in Figure 1-21 and
Table 1-24 .
X-Ref Target - Figure 1-21
Figure 1-21: User SMA GPIO
UG5 3 4_21_072109
U S ER S MA GPIO N
J56 3 2K10K-400E 3
J76 3 2K10K-400E 3
GND1
S IG
1
1
S IG
GND2
GND
3
GND4
GND5
GND6
GND7
GND1
GND2
GND
3
GND4
GND5
GND6
GND7
U S ER S MA GPIO P
2
3
4
5
6
7
8
2
3
4
5
6
7
8
Table 1-24: User SMA Connections
U1 FPGA Pin Schematic Net Name SMA Pin
W34 USER_SMA_GPIO_N J56.1
V34 USER_SMA_GPIO_P J57.1