Xilinx M401, User Manual, Page: 22 / 32

22 www.xilinx.com ML401/ML402/ML403 Evaluation Platform
UG080 (v2.5) May 24, 2006
Detailed Description
R
Other Expansion I/O Connectors
In addition to the high-speed I/O paths, additional I/O signals and power connections are
available to support expansion cards plugged into ML40
x board (see Table 11, page 23 ).
The 14 I/O pins from the general purpose buttons and LEDs on the board are connected to
expansion connector J3. This arrangement permits additional I/Os to be connected to the
expansion connector if the buttons and LEDs are not used. It also allows the expansion
card to utilize the buttons and LEDs on the board.
The expansion connector also allows the board's JTAG chain to be extended onto the
expansion card by setting jumper J26 accordingly.
The IIC bus on the board is also extended onto the expansion connector to allow additional
IIC devices to be bused together. If the expansion IIC bus is to be utilized, the user must
have the IIC pull-up resistors present on the expansion card. Bidirectional level shifting
transistors allow the expansion card to utilize 2.5V to 5V signaling on the IIC bus.
Power supply connections to the expansion connectors provide ground, 2.5V, 3.3V, and 5V
power pins. If the expansion card draws significant power from the ML40
x board, the user
must ensure that the total power draw can be supplied by the board.
The ML40 x expansion connector is backward compatible with the expansion connectors
on the ML320, ML321, and ML323 boards, thereby allowing their daughter cards to be
used with the ML40
x evaluation platform. Table 11, page 23 summarizes the additional
expansion I/O connections.
J6, Pin 58 HDR1_58 AB21
J6, Pin 60 HDR1_8 AD22
J6, Pin 62 HDR1_62 AE24
J6, Pin 64 HDR1_64 AF24
Table 10: Expansion I/O Single-Ended Connections (J6) (Continued)
Header Pin Label FPGA Pin
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