AsyncLat [Auto] by Default
Max round trip latency from the CPU to the DRAM.
tRC [Auto] by Default
RAS# to RAS# or auto refresh time of the same bank.
tWR [Auto] by Default
Write recovery time.
tRWT [Auto] by Default
Minimum read to write turnaround time.
tWTR [Auto] by Default
Minimum write to read delay with same chip select.
tREF [Auto] by Default
DRAM refresh rate.
Read DQS Skew [Auto] by Default
Read DQS delayed with respect to the data. 1/96 MEMCLK per unit.
Read delay from Rx FIFO [Auto] by Default
Delay from DQS receiver enable to first data read from Rx FIFO.
Drive Strength Setting
Drive Strength Setting Menu
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Chapter 3: BIOS Setup
Summary of Contents for MCP55
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