WM8973-EV1M
w
Rev 1.0, February 2005
5
POWER SUPPLIES
Using appropriate power leads with 4mm connectors, power supplies should be connected
as described in Table 1.
REF-DES SOCKET
NAME
SUPPLY
J8 +5V
+5V
J2
DBVDD
+1.8V to +3.6V
J4
AVDD
+1.8V to +3.6V
J10
DCVDD
+1.42V to +3.6V
J47
HPVDD
+1.8V to +3.6V
J1 DGND
0V
J5 AGND
0V
Table 1 Power Supply Connections
The DGND and AGND connections may be connected to a common GND on the supply with
no reduction in performance.
To reduce the supply connections that need to be attached to the EVB, sites L1 and L8 are
populated with 0R resistors shorting AVDD, HPVDD and DBVDD. In this configuration it is
recommended that the supply only be attached to AVDD. If separate supplies are required
the 0R resistors should be removed from sites L1 and L8.
Note:
Refer to WM8973 datasheet for limitations on individual supply voltages.
Important: Exceeding the recommended maximum voltage can damage EVB
components. Under voltage may cause improper operation of some or all of the EVB
components.
BOARD FUNCTIONALITY
There are three options for inputting digital data into the WM8973 evaluation board. There is
a coaxial input (J19) via a standard phono connector or an optical input (U3) via a standard
optical receiver module. A direct digital input is also available via one side of a 2x8 pin
header (H1).
The analogue input signals are applied to the evaluation board via phono connectors J7
(RLINE_IN1), J12 (LLINE_IN1), J14 (RLINE_IN2), J22 (LLINE_IN2), J26 (RLINE_IN3) and
J45 (LLINE_IN3). Analogue inputs can also be applied to the evaluation board via 3.5mm
jack sockets J9 (MIC_IN1); J16 (MIC_IN2) and J30 (MIC_IN3).
There are two options for outputting digital data from the WM8973 evaluation board. There is
a coaxial output (J29) via a standard phono connector. The digital signals may also be
accessed via one side of a 2x8 pin header (H2).
The analogue outputs of the board are via phono connectors J43 (ROUT1), J44 (LOUT1),
J41 (LOUT2), J42 (ROUT2), J39 (MONO OUT) and J40 (OUT3). There is also an analogue
output via a 3.5mm jack socket J46 (HP_OUT).
All WM8973 device pins are accessible for easy measurement via the 2x4 pin headers (J13,
J15, J17 and J21) running up each side of the device.
Level-shift IC (U4) is used to shift the fixed +5V digital input from the CS8427 (U5) down to
the same level as DBVDD and vice-versa.
Summary of Contents for WM8973-EV1B
Page 1: ...WM8973 EV1M Evaluation Board User Handbook Rev 1 0...
Page 3: ...WM8973 EV1M w Rev 1 0 February 2005 3 EVALUATION SUPPORT 44 IMPORTANT NOTICE 45 ADDRESS 45...
Page 21: ...WM8973 EV1M w Rev 1 0 February 2005 21 SCHEMATIC LAYOUT Figure 13 Functional Diagram...
Page 22: ...WM8973 EV1M w Rev 1 0 February 2005 22 Figure 14 Digital Input...
Page 23: ...WM8973 EV1M w Rev 1 0 February 2005 23 Figure 15 Software Control...
Page 24: ...WM8973 EV1M w Rev 1 0 February 2005 24 Figure 16 Level Shift...
Page 25: ...WM8973 EV1M w Rev 1 0 February 2005 25 Figure 17 Analogue Input...
Page 26: ...WM8973 EV1M w Rev 1 0 February 2005 26 Figure 18 WM8973...
Page 27: ...WM8973 EV1M w Rev 1 0 February 2005 27 Figure 19 Analogue Output...
Page 28: ...WM8973 EV1M w Rev 1 0 February 2005 28 Figure 20 Power...
Page 29: ...WM8973 EV1M w Rev 1 0 February 2005 29 WM8973 EV1B PCB LAYOUT Figure 21 Top Layer Silkscreen...
Page 30: ...WM8973 EV1M w Rev 1 0 February 2005 30 Figure 22 Top Layer...
Page 31: ...WM8973 EV1M w Rev 1 0 February 2005 31 Figure 23 Bottom Layer...
Page 32: ...WM8973 EV1M w Rev 1 0 February 2005 32 Figure 24 Bottom Layer Silkscreen...