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F2 ULV-CPU
52
POST Code
(Hex)
Name
Description
5Bh
CPU_CACHE_OFF
Disable and WB invalidate CPU cache.
5Ch
MEMORY_TEST
Determine amount of memory below 1M.
Walk a1 through data bus at 80000h.
walk a 0 through data bus at 80000h.
Check for stuck address line from 80000h to 8FFFFh.
60h
EXT_MEMORY
Determine total amount of memory by doing a read/write
test.
For each 1M block oh memory:
Walk a 1 through data bus at first location of block.
Walk a 0 through data bus at first location of block.
Check for stuck address line in the block.
62h
EXT_ADDR
Do an extended address line test on the entire memory
range.
64h
USERPATCH
Code that is patched into the ROM can be set up to
execute at this point.
66h
CACHE_ADVNCD
Load L2 cache controller configuration registers with
values from setup screens.
68h
CACHE_CONFIG
Set non-cacheable regions.
Enable L1 and L2 caches.
6AH
DISP_CACHE
IF <cache RAM size not zero> THEN
Display L2 cache RAM size on screen.
ENDIF
6Ch
DISP_SHADOW
IF <system BIOS ROM shadowed> THEN
Display message indicating that the system BIOS
ROM is shadowed.
ENDIF
IF <video BIOS ROM shadowed> THEN
Display message indicating that the video BIOS
ROM is shadowed.
ENDIF
6Eh
DISP_NONDISP
Display the starting address of the no disposable (run
time) BIOS.
70h
ERROR_MSGS
Display error messages for any errors found.
72h
TEST_CONFIG
IF <system configuration error found> THEN
Display message indicating configuration error
detected.
ENDIF
74h
RTC_TEST
Verify that the RTC is running.
IF <RTC not running> THEN
Set bit in RTC indicating that the time is invalid.
ENDIF
76h
KEYBOARD
IF <keyboard failure detected> THEN
Display message indicating keyboard failure.
ENDIF
7Ch
HW_INTS
Initialize hardware interrupt vectors 08h-0Fh
7Dh
ISM_INIT
Initialize Intelligent System Monitoring Support.
80h
IO_BEFORE
IF <integrated super I/O exists> THEN
Disable LPT and COM ports on integrated super
I/O.
ENDIF.
81h
CORE_LATE_INIT
Late initialization of devices.
82h
RS232
Identify and test all COM ports.
83h
CONFIG_IDE
Configure Fdisk controller.
84h
LPT
Test and ID parallel ports.
85h
PCI_PCC
Initialize PnP ISA devices.