W78C438C
Publication Release Date: July 1998
- 9 -
Revision A1
BIT
ADDR.
NAME
FUNCTION
7
0C7H
PX3
High/low priority level for
INT3
is specified when this bit is set/cleared by software.
6
0C6H
EX3
Enable/disable interrupt from
INT3
when this bit is set/cleared by software.
5
0C5H
IE3
If IT3 is "1," IE3 is set/cleared automatically by hardware when interrupt is
detected/serviced.
4
0C4H
IT3
INT3
is falling-edge/low-level triggered when this bit is set/cleared by software.
3
0C3H
PX2
High/low priority level for
INT2
is specified when this bit is set/cleared by software.
2
0C2H
EX2
Enable/disable interrupt from
INT2
when this bit is set/cleared by software.
1
0C1H
IE2
If IT2 is "1," IE2 is set/cleared automatically by hardware when interrupt is
detected/serviced.
0
0C0H
IT2
INT2
is falling-edge/low-level triggered when this bit is set/cleared by software.
Table 2. Functions of XICON Register
INTERRUPT SOURCE
VECTOR ADDRESS
PRIORITY SEQUENCE
External Interrupt 0
03H
0 (Highest)
Timer/Counter 0
0BH
1
External Interrupt 1
13H
2
Timer/Counter 1
1BH
3
Serial Port
23H
4
Timer/Counter 2
2BH
5
External Interrupt 2
33H
6
External Interrupt 3
3BH
7 (Lowest)
Table 3. Priority of Interrupts
Newly Added Special Function Registers
The W78C438C uses four newly defined special function registers, which are described in Table 4. To
read/write these registers, use the "MOV direct" or "read-modify-write" instructions.
REGISTER
ADDR.
FUNCTION
LENGTH
R/W
TYPE
VALUE
AFTER
RESET
1
HB
A1H
During the execution of "MOVX @Ri," the content of HB is output to
AP6.
8
R/W
00H
2
EPMA
A2H
EPMA.7 determines functions of AP7.
EPMA.3
−
EPMA.0 determine values of AP7<3:0> when EPMA.7 is
"0."
8
R/W
70H
3
P8
A6H
The content of P8 is output to port 8.
8
R/W
0FFH
4
XICON
C0H
The bits of XICON determine/show the functions/status of INT2
−
INT3 . Bit-addressable.
8
R/W
00H
Table 4. Newly Added Special Function Registers of the W78C438C
