W78C438C
Publication Release Date: July 1998
- 7 -
Revision A1
(A) EPMA.7 = 0
W78C438
EPROM
RAM
AP5
PSEN
ADDR 1MB
(20-bit)
ADDR (20-bit)
DATA
AP6
DP4
WR
RD
P3
OE
WE
OE
AP7
P1
P0
P2
P8
INT1
INT3
INT0
INT2
\ 8
\ 4
\ 8
\ 8
64K PROGRAM
DATA AREA
When bit 7 of the EPMA is "1," AP7<3:0> are the output pins that support memory-mapped peripheral
chip select logic, which eliminates the need for glue logic. These pins are decoded by AP6<7:6>.
Only one pin is active low at any time. That is, they are active individually with 16K address
resolution. For example, CS0 is active low in the address range from 0000H to 3FFFH, CS1 is active
low in the address range from 4000H to 7FFFH, and so forth.
(B) EPMA.7 = 1
W78C438
AP5
PSEN
AP6
DP4
WR
RD
P3
P1
P0
P2
P8
INT1
INT3
INT0
INT2
RAM
ADDR (14-bit)
DATA
WE
OE
AP7.0
AP7.1
AP7.2
AP7.3
0000h
3FFFh
4000h
7FFFh
8000h
BFFFh
C000h
FFFFh
\ 8
\ 8
\ 6
\ 8
\ 8
Device
Device
Device
(16k)
(16k)
(16k)
(16k)
EPROM
OE
64K PROGRAM
DATA AREA
ADDR (16-bit)
