Viking VX 900 MHz LTR, User Manual

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CIRCUIT DESCRIPTION
6-48
October 1999
Part No. 001-2009-201
Pin 30 RF DATA B
Data B (U105, pin 10) is the middle significant
bit in the 3 multiplex chips located on the RFIB. This
pin is a CMOS input from the Controller requiring a
logic high for activation.
Pin 31 RF DATA C
Data C (U105, pin 9) is the most significant bit
(MSB) in the 3 multiplex chips located on the RFIB.
This pin is a CMOS input from the Controller requir-
ing a logic high for activation.
Pin 32 RF DATA
This is a data pin with TTL levels from the Con-
troller which has the dual role of loading the synthe-
sizer chips and adjusting the power control D/A lines
for proper output power. Up to four synthesizer chips
and a shift-register could be connected to this pin.
6.13.7 J500 A D LEVEL TEST POINT
20 lines (of the possible 24) of RF functions sam-
pled are multiplexed to the Controller through this pin
using three multiplex chips.
6.13.8 J501 GROUND
J501 is an IAC ground reference for test points.
6.13.9 J502 +15V
J502 is a voltage test point.
6.13.10 POWER SWITCH
S508 turns the power supply DC voltage on and
off from the front of the IAC.
6.13.11 J505 SQUELCH ENABLE OUTPUT
P505 jumpers J505, pins 1/2 to configure the
squelch enable output for an inverted output. If P505
jumpers J505, pins 2/3 the output is non-inverted. If
P505 jumpers J505, pins 3/4 the output is non-inverted
and under the control of U503.