DO-D7
P500
DATA BUS (7:0)
U501
A
B
C
D
Q3
A16
A17
A18
A19
A
B
C
A13
A14
A15
U500
A13-A19
G1
G2
MREQ
O3
O2
O5
O7
O4
O1
O6
THERMAL
SENSOR
Q1
INTR
U506
RD
WR
D0-D7
V IN+
READ
WRITE
Q6
Q8
Q7
CLK
Q5
Q4
Q3
Q2
Q1
U518
IAC ADDRESSING
LED CONTROL
D0-D7
+5V
MISC INPUTS
U517
Q1-Q8
OC
D1
D8
D3
RF INTERFACE
U505
D0-D7
RF MUX 1 INH
RF MUX 2 INH
RF MUX 3 INH
PC STR
HS CS EX
STN CS EX
HS CS RX
STN CS RX
WO 1
AC FAIL IN
P501
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
U521
OC
CLK
Q1-Q8
D1
D2
D6
D3
D4
U504
D0-D7
RF DATA A
RF DATA B
RF DATA C
RF DATA
RF CLK
AC FAIL OUT
WO 2
EXT REQ 1
Q1
Q2
Q3
Q4
Q5
Q6
Q7
CLK
Q8
U508E
U508
U507D
J500
U507A
U519
RSSI O
IFA IN
U509A
U509B
U507B
U509C
U507C
ANALOG LEVEL DETECTOR
U503
D1-D8
CLK
Q2
Q1
Q501
Q500
K501
K500
+
-
ALARM 2 OUT
+
-
ALARM 1 OUT
Q5
Q6
Q3
Q4
Q7
+
-
K502
+
-
K503
Q502
Q503
ALARM 3 OUT
ALARM 4 OUT
U514B
U514A
BUF RX WBAND
RX WBAND
A D LEVEL
D2
U513B
U511
U513C
U512
CR513
CR512
+5V
+15V
S503
J504
+
-
ALARM 4 IN
CR511
CR510
+5V
+15V
S502
J503
+
-
ALARM 3 IN
EXT REQ 2
U510
CR509
CR508
+5V
+15V
S501
+
-
ALARM 2 IN
U520
CR507
CR506
+5V
+15V
S500
+
-
ALARM 1 IN
P500
ALARM INPUTS
Q505
Q504
SQUELCH
NON-INVERTED
NON-INVERTED
U503 CONTROL
INVERTED
J505
INTERFACE ALARM CARD BLOCK DIAGRAM
FIGURE 6-23
6-52
October 1999
Part No. 001-2009-201
Summary of Contents for VX 900 MHz LTR
Page 2: ...1 2 October 1995 Part No 001 2008 202...
Page 4: ...1 4 October 1995 Part No 001 2008 202...
Page 24: ...INTRODUCTION AND OPERATION 1 10 October 1999 Part No 001 2009 201...
Page 26: ...INTRODUCTION AND OPERATION 1 12 October 1999 Part No 001 2009 201...
Page 40: ...INSTALLATION 2 14 October 1999 Part No 001 2009 201...
Page 56: ...PULL DOWN MENUS 4 12 October 1999 Part No 001 2009 201...
Page 60: ...REPEATER PROGRAMMING 5 4 October 1999 Part No 001 2009 201...
Page 142: ...SERVICING 8 8 October 1999 Part No 001 2009 201...