Carrier Board Design Guide for SOM-9X35 Module
59
4.8.2 GPIO Extender
If the carrier board needs more GPIOs, a GPIO extender is required.
RPI_GPIO13
[25]
RPI_GPIO14
[25]
RPI_GPIO15
[25]
RPI_GPIO16
[25]
RPI_GPIO17
[25]
RPI_GPIO18
[25]
RPI_GPIO12
[25]
RPI_GPIO11
[25]
P27_IOEXP2
[15]
P26_IOEXP2
[15]
RN41
33
1
2
3
4
5
6
7
8
RN42
33
1
2
3
4
5
6
7
8
P24_IOEXP2
P25_IOEXP2
P23_IOEXP2
P22_IOEXP2
P21_IOEXP2
P20_IOEXP2
P27_IOEXP2
P26_IOEXP2
3V3_VCC
FB59
120 OHM
2000mA
R357
10K
C617
0.1uF
16V X7R
C620
0.1uF
16V X7R
U35
TCA6424ARGJR
P00
1
P01
2
P02
3
P03
4
P04
5
P05
6
P06
7
P07
8
P10
9
P11
10
P12
11
P13
12
P14
13
P15
14
P16
15
P17
16
P20
17
P21
18
P22
19
P23
20
P24
21
P25
22
P26
23
P27
24
GND
25
ADDR
26
Vccp
27
RESET
28
SCL
29
SDA
30
Vcci
31
INT
32
G1
G1
C619
4.7uF
16V
X6S
3V3_IO_EXP2
AD0_IO_EXP2
3V3_IO_EXP2
nINT_IOEXP2
RSTn_IOEXP2
I2C_SCL_IOEXP2
I2C_SDA_IOEXP2
P15_IOEXP2
P14_IOEXP2
P16_IOEXP2
P17_IOEXP2
P11_IOEXP2
P10_IOEXP2
P12_IOEXP2
P13_IOEXP2
P05_IOEXP2
P04_IOEXP2
P06_IOEXP2
P07_IOEXP2
P01_IOEXP2
P00_IOEXP2
P02_IOEXP2
P03_IOEXP2
P24_IOEXP2
P25_IOEXP2
P23_IOEXP2
P22_IOEXP2
P21_IOEXP2
P20_IOEXP2
P27_IOEXP2
P26_IOEXP2
1V8_IO_EXP2
1V8_VCC
1V8_VCC
EXT_INT3
[5]
R372
15K_1%
C625
0.1uF
16V X7R
R362
15K_1%
RSTn_IOEXP2
nINT_IOEXP2
1V8_VCC
C758
0.1uF
16V
X7R
FB70
BLM15PX121SN1D
120 OHM
2000mA
C618
2.2uF
10V
X7R
1V8_IO_EXP2
RPI_GPIO10
CAM1_PDN
CAM1_RESET
CAM2_PDN
CAM2_RESET
CAM3_PDN
CAM_EN_POWER
4G_W_DISABLE
4G_PERST
4G_UART_DTR
4G_WAKEIN
GPIO_HP_DET
GPIO_HPMC_DET
GPIO_SPK_EN
RPI_GPIO3
RPI_GPIO2
RN39
33
1
2
3
4
5
6
7
8
RN60
33
1
2
3
4
5
6
7
8
RN40
33
1
2
3
4
5
6
7
8
RN61
33
1
2
3
4
5
6
7
8
P15_IOEXP2
P14_IOEXP2
P16_IOEXP2
P17_IOEXP2
P11_IOEXP2
P10_IOEXP2
P12_IOEXP2
P13_IOEXP2
P04_IOEXP2
P05_IOEXP2
P06_IOEXP2
P07_IOEXP2
P01_IOEXP2
P00_IOEXP2
P02_IOEXP2
P03_IOEXP2
[17]
[17]
[17]
[17]
[17]
[17]
[6]
[6]
[6]
[6]
[22]
[22]
[22]
[25]
[25]
[25]
I2C_SCL_IOEXP2
I2C_SDA_IOEXP2
[17,23]
[17,23]
GPIO Expander
Figure 72:
GPIO expander reference circuitry
4.9 ADC Interface
The SOM-9X35 module features an ADC interface.
4.9.1
ADC Signal Definition
The following table provides the definition of the ADC signals that are implemented in the M.2 slot.
Signal Name
Pin #
I/O
Pad Characteristics
Description
Voltage
Type
ADC_VIN0
J2.67
AUX_IN2
1.8V
AI
MT8365 AUX_IN2
Table 34: SOM-9X35 ADC signal definition
4.9.2
ADC Design Notes
•
Input range support max. 1.45V.
•
12-bit resolution.
•
Connect the J2.67 ADC_VIN0 input pins to the GND when not used.
•
In order to prevent power leakage, the AUX_IN2 input signal should not be supplied power while the
system is suspended.
• Add a 0.1 uF decouple cap for all AUX_IN2 pins used. The cap should be placed close to the M.2 slot.