VIA Technologies SOM-9X35, Design Manual, Page: 43 / 81

Carrier Board Design Guide for SOM-9X35 Module
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4.2 MIPI DSI Interface
The SOM-9X35 module features a MIPI DSI interface. The MIPI DSI interface has four differential pair signals
that carry video display signals.
4.2.1 MIPI DSI Signal Definition
The following table provides the definition of the MIPI DSI signals that are implemented in the M.2 slot.
Signal Name Pin # I/O
Pad Characteristics
Description
Voltage Type
DSI_D3P J1.34 AO MIPI display serial interface lane 3 –positive
DSI_D3N J1.36 AO MIPI display serial interface lane 3 –negative
DSI_D1P J1.38 AO MIPI display serial interface lane 1 –positive
DSI_D1N J1.40 AO MIPI display serial interface lane 1 –negative
DSI_CKP J1.44 AO MIPI display serial interface clock – positive
DSI_CKN J1.46 AO MIPI display serial interface clock – negative
DSI_D2N J1.50 AO MIPI display serial interface lane 2 – negative
DSI_D2P J1.52 AO MIPI display serial interface lane 2 – positive
DSI_D0N J1.54 AO MIPI display serial interface lane 0 – negative
DSI_D0P J1.56 AO MIPI display serial interface lane 0 – positive
DISP_PWM J1.74 DISP_PWM 1.8V I, PD DISP_PWM,LCM Brightness PWM output
LCM_RST J1.72 LCM_RST 1.8V I, PD LCD Reset output, High active
LCM_ENP J1.70 GPIO116 1.8V I, PD LCM power enable output, High active
LCM_ENN J1.68 GPIO127 1.8V I, PD LCM AVDD enable Output, High active
Table 10: MIPI DSI signal definition
Route Differen�ally
Route Differen�ally
Route Differen�ally
Route Differen�ally
DSI LCD
Connector
SOM-9X35
M.2 Slot
Edg
e fing
er
DSI_D3P
DSI_D0N
DSI_D0P
LCD Control
DSI_D2P
DSI_D3N
DSI_D1P
DSI_D1N
DSI_CKP
DSI_CKN
DSI_D2N
ESD Protec�on
& Common
Choke
Route Differen�ally
Figure 43: MIPI DSI routing topology