VersaLogic VL-12CT96, Reference Manual

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VL-12CT96/7 Analog & Digital I/O Card
5-3
Initialize VL-12CT96/7 for Auto-increment (if desired)
Set bit D4 in the CONTROL register. See page 4-2 for further information.
Auto-increment mode is optional when using interrupts. Use it when you want to convert a series of
analog input channels beginning with the channel in the SELECT register. Auto-increment mode
eliminates the CPU overhead of writing to the SELECT register. When disabled, the VL-12CT96/7 will
convert the channel in the SELECT register repeatedly without a settling delay penalty.
Trigger A/D conversion
Write any value to the CONVERT register to begin. An interrupt is generated when the VL-12CT96/
7 completes an A/D conversion.
Analog Output
Writing to a VL-12CT96/7 analog output channel is as simple as writing 12 bits of data to the desired
output registers. Each channel has two registers, DACxLO and DACxHI. DACxLO should be written
to first, followed by DACxHI. When DACxHI is updated the analog output value will change. See page
4-10 for further information.
• Determine address of desired channel.
• Output data to channel register: Low byte first, high byte second; or a single 16-bit output.
Digital I/O
Signal Direction
All of the VL-12CT96/7 parallel port signals are bidirectional. The logic state of any channel can be
read by reading the PARHI or PARLO register. The logic level on any channel can be manipulated by
writing a 1 or 0 to the apprioriate bit in the PARHI or PARLO register.
If a channel is driven low, that channel cannot be used for input until it is released. See page 4-12 for
further information.
• Initialize by writing zeros to all input channels.
• Output by writing bytes or words to PARLO and PARHI registers. Always write zeros to input
channels.
• Input by reading bytes or words from PARLO and PARHI registers.
Operation — Analog Output