VersaLogic Lion VL-EPMe-42, Reference Manual

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FPGA Registers
Lion (VL-EPMe-42) Programmer’s Reference Manual 25
AUXMODE2– AUX I/O Mode Register #2
This register defines the interrupt mapping for the AUX GPIOs. Reset type is Platform.
Table 27: AUXMODE2 - AUX I/O Mode Register #2
Bits Identifier Access Default Description
7 IRQEN
R/W
0
AUX GPIO interrupt enable/disable:
0 – Interrupts disabled
1 – Interrupts enabled
6-4 IRQSEL(2:0)
R/W
000
AUX GPIO interrupt IRQ select in LPC SERIRQ:
000 – IRQ3
001 – IRQ4
010 – IRQ5
011 – IRQ10
100 – IRQ6
101 – IRQ7
110 – IRQ9
111 – IRQ11
3-0 Reserved
RO
0000 Reserved. Writes are ignored; reads always return 0.
FANCON – Fan Control Register
The fan is always off in any sleep mode. When the processor comes out of a sleep state, this register must
be setup again since it will be reset to default by the platform reset signal. The fan is always turned “off” in
sleep modes. No PWM fan control is supported on the EPMe-42.
Reset type is Platform.
Note:
The BIOS (via ACPI) may modify this register when in an ACPI-capable operating system. The
register can be read for status purposes but do not write to it unless you are using a non-ACPI operating
system.
Table 28: FANCON – Fan Control Register
Bits Identifier Access Default Description
7-1 Reserved
RO
0000000 Reserved. Writes are ignored; reads always return 0.
0 FAN_OFF
R/W
0
Fan enable:
0 – Fan is on
1 – Fan is off