FPGA Registers
Lion (VL-EPMe-42) Programmer’s Reference Manual
24
WDT_VAL – Watchdog Value Register
This register sets the number of seconds for a Watchdog prior to enabling the watchdog. By writing this
value, the watchdog can be prevented from “firing”. A watchdog fires whenever this registers value is all 0s,
so it must be set to a non-zero value before enabling the watchdog to prevent an immediate “firing”. Reset
type is Platform.
The value written should always be 1 greater than the desired timeout value due to a 0-1 second “tick” error
band (values written should range from 2-255 because a 1 could cause an immediate trigger); that is, the
actual timeout is WDT_VAL seconds with a -1 second to 0 second error band.
Table 25: WDT_VAL – Watchdog Control Register
Bits
Identifier
Access
Default
Description
7-0
WDT_VAL(7:0)
R/W
0x00
Number of seconds before the Watchdog fires. By default, it is
set to zero which results in an immediate watchdog if WDT_EN is
set to a ‘1’.
XCVRMODE – COM Transceiver Mode Register
Sets the RS232 vs RS422/485 mode on the COM port Transceivers. These drive the UART_SEL signals
from the FPGA to the Transceivers.
Reset type is Platform.
Note:
The values shown are for the default BIOS configuration.
Table 26: XCVRMODE – COM Transceiver Mode Register
Bits
Identifier
Access
Default
Description
7-4
Reserved
RO
0000
Reserved. Writes are ignored; reads always return 0.
3-2
Reserved
RO
00
Reserved. Writes are ignored; reads always return 0.
1
COM2_MODE
R/W
0
COM2 Transceiver mode:
0 – RS232
1 – RS422/485
0
COM1_MODE
R/W
0
COM1 Transceiver mode:
0 – RS232
1 – RS422/485
