Another problem that arises with a 35 MHz IF on a magnetron system, is the RVP900
computation of AFC. If the processor cannot distinguish 37 MHz from 35 MHz, then it cannot
tell the difference between the STALO being correctly on frequency, versus being 2 MHz too
high. The symmetric AFC tracking range is reduced to the very small interval 34 MHz to 36
MHz.
For similar reasons (that is, transition band width), the digital FIR filter also becomes
difficult to design when its passband is near a Nyquist multiple. But there is an additional
constraint that the digital filter should have a very large attenuation at DC. This is so that
fixed offsets in the A/D converter do not propagate into the synthesized
I
and
Q
data. Since
36 MHz is aliased into DC, we are left with the contradictory requirements of a zero very
close to the edge of the filter's passband.
4.3 Installing RVP902 Main Chassis
RVP902 has two power supplies.
Disconnect power from both supplies when powering down or servicing unit.
WARNING!
1. Mount the chassis in a nearby equipment rack on rack slides.
2. Using the shielded Ethernet cable to connect the IFDR to the main chassis.
3. Connect the power.
The power requirements are 100 VAC to 240 VAC, 50 Hz to 60 Hz, 10–4 Amps.
There are dual-redundant power supplies, with two line cords.
Due to redundant power supplies, RVP902 Rev C and D have High
Leakage Current has a High Leakage Current.
To meet EN60950-1 safety standards, the RVP902 chassis ground point must make
a low impedance connection to the earth ground.
WARNING!
More Information
‣
RVP902 Signal Processing Computer Specifications (page 334)
4.3.1 Powering-up RVP902
1. Power-up and boot RVP901.
2. Start or reset RVP902.
3. If RVP901 is not already powered-up and booted, the
rvp900
process cannot start.
The host Linux PC goes through an automated boot process that ultimately starts the
RVP902 application.
Chapter 4 – RVP Hardware
73
Summary of Contents for RVP900
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