MIA-M10Q - Integration manual
To minimize signal loss on the RF connection from the antenna to the receiver input and to avoid
possible coupled interference, the connection to the antenna must be kept short while keeping some
distance from the antenna to other electronic components.
The RF section should not be subject to noisy digital supply currents running through its GND plane.
Make sure that critical RF circuits are clearly separated from any other digital circuits on the system
board. To achieve this, position the receiver digital part towards the digital section of the system
PCB and place the RF section and antenna as far away as possible from the other digital circuits on
the board. Keep at least a 5 mm distance to any RF component and ensure proper grounding.
For applications using cellular antennas, increase the distance between both antennas as
much as possible.
Another very important factor in GNSS applications is the grounding concept. Ensure good ground
reference to the host ground by increasing the number of GND vias. The GND vias will improve the
GND reference between all the layers, and the pads will serve as thermal relief.
Any stubs at the ground planes must be avoided or ended with a via to the reference ground.
Otherwise, they could pick up and propagate interference.
Figure 31: GND stub ended with a via highlighted in red
For the RF signal line, it is best to use the co-planar waveguide with ground on the second layer. All
the RF parts need a solid GND plane underneath in order to achieve the targeted impedance in the
RF signal line.
shows a PCB design with the top layer and layer below. The grey areas represent the GND
planes in both layers. It is recommended to connect all GND islands in the TOP layer and add as much
GND vias as possible to the layer beneath for a strong ground reference. The red colored vias are for
other digital signals or supply lines of the inner pads. The outter pads can be directly routed out. All
the GND pads should be connected to the GND plane with airgaps, working as thermal reliefs during
the soldering process.
UBX-21028173 - R01
3 Hardware integration
Page 73 of 89
C1-Public