MIA-M10Q - Integration manual
Following the start condition from the master, the 7-bit device address and the RW bit (which is a
logic low for write access) are clocked onto the bus by the master transmitter. The receiver answers
with an acknowledge (logic low) response to indicate that it is responsible for the given address.
The master can write 2 to N bytes to the receiver, generating a stop condition after the last byte
being written. To properly distinguish from the write access to set the address counter in random
read accesses, the number of data bytes must be at least 2.
Figure 9: I2C write access
2.3.3 PIOs
This section describes the PIOs supported by the MIA-M10Q. All the PIOs are supplied by V_IO. So
all voltage levels of the PIOs are related to V_IO supply voltage. All the inputs have internal pull-up
resistors in normal operation and can be left open if not used.
When assigning a different function to a PIO, ensure that the default function is disabled
where applicable. For example, disable the I2C interface with the CFG-I2C-ENABLED
configuration key if I2C pins are used for antenna supervisor functions.
2.3.3.1 RESET_N
MIA-M10Q provides a RESET_N pin to reset the receiver. The RESET_N pin is an input-only pin with
an internal pull-up resistor to V_IO and should be left open for normal operation. Driving RESET_N
low for at least 1 ms will trigger a reset of the receiver. The RESET_N complies with the V_IO level
and can be actively driven high.
Use RESET_N only in critical situations to recover the receiver. RESET_N resets the receiver
and clears the BBR content including receiver configuration, real-time clock (RTC), and
GNSS orbit data, triggering a cold start.
No capacitor should be placed at RESET_N to GND, otherwise it could trigger a reset on
every startup.
2.3.3.2 SAFEBOOT_N
The SAFEBOOT_N pin is for future service, updates and reconfiguration.
The SAFEBOOT_N pin is internally connected to the TIMEPULSE pin through a 1 kΩ series
resistor.
2.3.3.3 TIMEPULSE
The MIA-M10Q features one time pulse signal in the TIMEPULSE pin. This can only be configured in
PIO04. The details about this feature are explained in the section
.
UBX-21028173 - R01
2 Receiver functionality
Page 25 of 89
C1-Public
