A P P L I C A T I O N S
D U A L - T R A C E A P P L I C A T I O N S
Introduction:
The most obvious and yet the most useful feature
of the dual-trace oscilloscope is that it has the
capability for simultaneously viewing two
waveforms that are frequency or phase-related, or
that have a common synchronizing voltage, such as
in digital circuitry. Simultaneously viewing of input
and its output is an invaluable aid to the circuit
designer or the repairman. Several possible
applications of the dual-trace oscilloscope will be
reviewed in detail to familiarize the user further in
the basic operation of this oscilloscope.
Frequency Divider Waveforms Viewing:
Fig. 5 illustrates the waveform involved in a basic
divide-by-two circuit. Fig. A indicates the
reference or clock pulse train. Fig. B and Fig. C in-
dicate the possible outputs of the divide-by-two cir-
cuitry. Fig. 6 also indicates the settings of specific
oscilloscope controls for viewing these waveforms.
In addition to these basic control settings, the
T R I G G E R I N G
LEVEL control, as well as the
C H 1
and
C H 2
vertical position controls should be set as
required to produce suitable displays. In the draw-
ing of Fig. 5, the waveform levels of
2
div are in-
dicated. If exact voltage measurements of
C H 1
and
C H 2
are desired, the
C H 1
and
C H 2
VARIABLE
controls must be placed in the CAL position. The
C H 2
waveform may be either that indicated in Fig.
5 B or Fig. 5 C . In Fig. 5 C , the divide-by-two out-
put waveform is shown for the case where the out-
put circuitry responds to a negative-going
waveform. In this case, the output waveform is
shifted with respect to the leading edge of the
Fig. 5 Waveforms in divide-by-two circuit
reference frequency pulse by a time interval cor-
responding to the pulse width. When observing
two signals having different cycle similtaneously,
the signal having low cycle should be triggered.
Divide-by-8 Circuit Waveforms:
Fig. 6 indicates waveform relationships for a basic
divide-by-eight circuit. The basic oscilloscope set-
tings are identical to those used in Fig. 5. The
reference frequency of Fig. 6 A is supplied to the
Channel
1
input and the divide-by-eight output is
applied to the
C H 2
input. Fig. 6 indicates the time
relationship between the input pulses and output
pulses.
In an application where the logic circuitry is
operating at or near its maximum design frequency,
the accumulated rise time effects of the con-
secutive stages produce a built-in time propagation
delay which can be significant in a critical circuit
and must be compensated for. Fig. 6 C indicates
the possible time delay which may be introduced
into a frequency divider circuit. By use of the dual-
trace oscilloscope, the input and output waveforms
can be superimposed (ADD or SUB) to determine
the exact amount of propagation delay that occurs.
10
A . R E F E R E N C E F R E Q U E N C Y P U L S E T R A I N
( 1 0 0 0 P U L S E S P E R S E C O N D )
L E A D I N G E D G E S M A Y N O T B E
V I S I B L E A T F A S T S W E E P R A T E S
B. D I V I D E - B Y - T W O O U T P U T S Y N C H R O N I Z E D T O
L E A D I N G E D G E O F R E F E R E N C E P U L S E
C D I V I D E - B Y - T W O O U T P U T S Y N C H R O N I Z E D T O
T R A I L I N G E D G E O F R E F E R E N C E P U L S E
