User's Manual l MBa8Xx UM 0100 l © 2020, TQ-Systems GmbH
Page 30
Dual channel LVDS / MIPI_DSI (continued)
Table 32:
Pinout LVDS (X14)
Pin
Signal
Dir.
Level
Remark
1
MIPI_DSI0_DATA0–
O
1.8 V
DSI interface 1 (Lane 0)
2
MIPI_DSI
O
1.8 V
3
MIPI_DSI0_DATA1–
O
1.8 V
DSI interface 1 (Lane 1)
4
MIPI_DSI
O
1.8 V
5
MIPI_DSI0_DATA2–
O
1.8 V
DSI interface 1 (Lane 2)
6
MIPI_DSI
O
1.8 V
7
GND
P
0 V
Ground
8
MIPI_DSI0_CLOCK–
O
1.8 V
DSI interface 1 (Clock)
9
MIPI_DSI
O
1.8 V
10
MIPI_DSI0_DATA3–
O
1.8 V
DSI interface 1 (Lane 3)
11
MIPI_DSI
O
1.8 V
12
MIPI_DSI1_DATA0–
O
1.8 V
DSI interface 2 (Lane 0)
13
MIPI_DSI
O
1.8 V
14
GND
P
0 V
Ground
15
MIPI_DSI1_DATA1–
O
1.8 V
DSI interface 2 (Lane 1)
16
MIPI_DSI
O
1.8 V
17
GND
P
0 V
Ground
18
MIPI_DSI1_DATA2–
O
1.8 V
DSI interface 2 (Lane 2)
19
MIPI_DSI
O
1.8 V
20
MIPI_DSI1_CLOCK–
O
1.8 V
DSI interface 2 (Clock)
21
MIPI_DSI
O
1.8 V
22
MIPI_DSI1_DATA3–
O
1.8 V
DSI interface 2 (Lane 3)
23
MIPI_DSI
O
1.8 V
24
GND
P
0 V
Ground
25
V_5V_LVDS
P
5 V
5 V supply voltage (filtered from V_5V)
26
V_5V_LVDS
P
5 V
27
V_5V_LVDS
P
5 V
28
V_3V3_LVDS
P
3.3 V
3.3 V supply voltage (filtered from V_3V3_MB)
29
V_3V3_LVDS
P
3.3 V
30
V_3V3_LVDS
P
3.3 V
M1, M2
GND
P
0 V
Ground
