User's Manual l MBa8Xx UM 0100 l © 2020, TQ-Systems GmbH
Page 9
TQMa8Xx pinout (continued)
Table 7:
Pinout TQMa8Xx connector X2
Dir.
Level
Group
Signal
Pin
Signal
Group
Level
Dir.
P
3.3 V
Power
V_3V3_TQM
1
2
V_3V3_TQM
Power
3.3 V
P
P
3.3 V
Power
V_3V3_TQM
3
4
V_3V3_TQM
Power
3.3 V
P
P
3.3 V
Power
V_3V3_TQM
5
6
V_3V3_TQM
Power
3.3 V
P
–
0 V
Ground
GND
7
8
GND
Ground
0 V
–
–
0 V
Ground
GND
9
10
GND
Ground
0 V
–
P
1.8 V
Power
V_1V8_OUT
( 5)
11
12
Power
1.8 V
P
I
1.8 V
CONFIG
BOOT_MODE0
13
14
GND
Ground
0 V
–
I
1.8 V
CONFIG
BOOT_MODE1
15
16
MCLK_OUT0
CLK
1.8 V
( 6)
O
I
1.8 V
CONFIG
BOOT_MODE2
17
18
MCLK_IN1
CLK
I
I
1.8 V
CONFIG
BOOT_MODE3
19
20
MCLK_IN0
CLK
I
P
1.8 V
Power
V_1V8_ANA
21
22
GND
Ground
0 V
–
P
3 V
Power
V_LICELL
23
24
MIPI_CSI_SCL
CSI
1.8 V
O
O
1.8 V
CONFIG
PMIC_FSOB_EWARN
25
26
MIPI_CSI_SDA
CSI
1.8 V
I/O
I
1.8 V
CONFIG
PMIC_PWRON
27
28
SCU_UART_RX
SCU UART
1.8 V
I
–
0 V
Ground
GND
29
30
SCU_UART_TX
SCU UART
1.8 V
O
I
1.8 V
CSI
MIPI_CSI_D0–
31
32
RESET_IN#
CONFIG
3.0 V
I
I
1.8 V
CSI
MIPI
33
34
RESET_OUT#
CONFIG
3.0 V
O
–
0 V
Ground
GND
35
36
GND
Ground
0 V
–
I
1.8 V
CSI
MIPI_CSI_D1–
37
38
I2C2_SCL
I2C
I/O
I
1.8 V
CSI
MIPI
39
40
I2C2_SDA
I2C
I/O
–
0 V
Ground
GND
41
42
GND
Ground
0 V
–
I
1.8 V
CSI
MIPI_CSI_D2–
43
44
SPI3_SCK
SPI
O
I
1.8 V
CSI
MIPI
45
46
SPI3_SDO
SPI
O
–
0 V
Ground
GND
47
48
SPI3_SDI
SPI
I
I
1.8 V
CSI
MIPI_CSI_D3–
49
50
SPI3_CS0
SPI
O
I
1.8 V
CSI
MIPI
51
52
SPI3_CS1
SPI
O
–
0 V
Ground
GND
53
54
PMIC_AMUX_VSD
DNC
–
O
I
1.8 V
CSI
MIPI_CSI_CLK–
55
56
GND
Ground
0 V
–
I
1.8 V
CSI
MIPI_
57
58
MIPI_CSI_MCLK
CSI
1.8 V
O
–
0 V
Ground
GND
59
60
GND
Ground
0 V
–
O
1.8 V
DSI / LVDS
MIPI_DSI1_D0–
61
62
MIPI_DSI0_D0–
DSI / LVDS
1.8 V
O
O
1.8 V
DSI / LVDS
MIPI_
63
64
MIPI_
DSI / LVDS
1.8 V
O
–
0 V
Ground
GND
65
66
GND
Ground
0 V
–
O
1.8 V
DSI / LVDS
MIPI_DSI1_D1–
67
68
MIPI_DSI0_D1–
DSI / LVDS
1.8 V
O
O
1.8 V
DSI / LVDS
MIPI_
69
70
MIPI_
DSI / LVDS
1.8 V
O
–
0 V
Ground
GND
71
72
GND
Ground
0 V
–
O
1.8 V
DSI / LVDS
MIPI_DSI1_D2–
73
74
MIPI_DSI0_D2–
DSI / LVDS
1.8 V
O
O
1.8 V
DSI / LVDS
MIPI_
75
76
MIPI_
DSI / LVDS
1.8 V
O
–
0 V
Ground
GND
77
78
GND
Ground
0 V
–
O
1.8 V
DSI / LVDS
MIPI_DSI1_D3–
79
80
MIPI_DSI0_D3–
DSI / LVDS
1.8 V
O
O
1.8 V
DSI / LVDS
MIPI_
81
82
MIPI_
DSI / LVDS
1.8 V
O
–
0 V
Ground
GND
83
84
GND
Ground
0 V
–
O
1.8 V
DSI / LVDS
MIPI_DSI1_CLK–
85
86
MIPI_DSI0_CLK–
DSI / LVDS
1.8 V
O
O
1.8 V
DSI / LVDS
MIPI_D
87
88
MIPI_D
DSI / LVDS
1.8 V
O
–
0 V
Ground
GND
89
90
GND
Ground
0 V
–
I
ENET
ENET0_INT#
91
92
ENET0_RESET#
ENET
O
I
ENET
ENET1_INT#
93
94
ENET1_RESET#
ENET
O
–
0 V
Ground
GND
95
96
GND
Ground
0 V
–
I
1.8 V
QSPI
QSPIB_DQS
97
98
SAI1_TXC
SAI
O
–
0 V
Ground
GND
99
100
SAI1_TXFS
SAI
O
O
1.8 V
QSPI
QSPIB_SCLK
101
102
SAI1_TXD
SAI
O
–
0 V
Ground
GND
103
104
GND
Ground
0 V
–
I/O
1.8 V
QSPI
QSPIB_DATA0
105
106
SAI1_RXC
SAI
I
I/O
1.8 V
QSPI
QSPIB_DATA1
107
108
SAI1_RXFS
SAI
I
I/O
1.8 V
QSPI
QSPIB_DATA2
109
110
SAI1_RXD
SAI
I
I/O
1.8 V
QSPI
QSPIB_DATA3
111
112
MIPI_CSI_EN
CSI
1.8 V
O
O
1.8 V
QSPI
QSPIB_SS0#
113
114
MIPI_CSI_RST#
CSI
1.8 V
O
O
1.8 V
QSPI
QSPIB_SS1#
115
116
I2C1_SDA
I2C
I/O
I/O
1.8 V
GPIO
GPIO3_IO15
117
118
I2C1_SCL
I2C
I/O
–
0 V
Ground
GND
119
120
GND
Ground
0 V
–
5:
Signal V_IO_IN on TQMa8Xx. V_IO_IN is hard-wired to 1.8 V on the MBa8Xx, see also chapter 3.10. Maximum load on pins 11 and 12 is 0.5 A each.
6:
Depends on X2-11 (V_IO_IN on TQMa8Xx). V_IO_IN is hard-wired to 1.8 V on the MBa8Xx, see also chapter 3.10.