Toshiba TDP-D1, Service Manual

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Read-Only Memory (ROM)
The ImageProcessor requires a ROM to hold firmware for the on-chip CPU. Typical ROM sizes
are 4Mbits or 8Mbits.The ROM device can be Flash, OTP PROM, or Mask ROM. Flash devices
allow in-system reprogramming.  Connect the ROM address and data buses to the ImageProcessor

address and data buses.
 Connect the OE pin of the ROM to the ImageProcesso

r ROMOE pin.
 For FLASH devices, connect the WE pin to the ImageProcessor ROMWE pin.

A 16-bit data bus is required. ROMs used with Pixelworks ImageProcessors should have an access
time of less than 150 ns.
External SRAM (Optional)
ImageProcessors can use external Static RAM (SRAM) for the processor’s local memory. This
is required only for applications where extremely complex user interfaces or other custom software
is used that requires more than the 32K of processor memory available on-chip. In these cases, the
SRAM can be connected to the ImageProcessor without external glue logic. RAMs used with
Pixelworks ImageProcessors should have an access time of less than 150 ns. Refer to the
ImageProcessor Evaluation Board schematics for details about how this part is connected.
Non-Volatile RAM
The Pixelworks ImageProcessor requires a serial EEPROM for Non-Volatile Random Access
Memory (NVRAM) to save user settings. Th e NVRAM is typically 16K-bits or 32K-bits.
Debugger Interface
ImageProcessor software development requires the use of a debugging system that employs a
ROM emulator. The ROM emulator replaces the system ROM, which is disabled. The ROM
emulator gets all the same signals as the system ROM. Debugging also requires a reset line and a
Non Maskable Interrupt (NMI) line.